Searched refs:regDMCUB_REGION3_CW5_OFFSET_BASE_IDX (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h555 #define regDMCUB_REGION3_CW5_OFFSET_BASE_IDX 2 macro
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H A Ddcn_3_2_1_offset.h555 #define regDMCUB_REGION3_CW5_OFFSET_BASE_IDX 2 macro
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H A Ddcn_3_1_6_offset.h1174 #define regDMCUB_REGION3_CW5_OFFSET_BASE_IDX 2 macro
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H A Ddcn_3_1_4_offset.h2195 #define regDMCUB_REGION3_CW5_OFFSET_BASE_IDX 2 macro
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H A Ddcn_3_1_5_offset.h677 #define regDMCUB_REGION3_CW5_OFFSET_BASE_IDX 2 macro
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H A Ddcn_3_1_2_offset.h970 #define regDMCUB_REGION3_CW5_OFFSET_BASE_IDX 2 macro
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