Searched refs:regDIG2_TMDS_STEREOSYNC_CTL_SEL (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h9637 #define regDIG2_TMDS_STEREOSYNC_CTL_SEL 0x22db macro
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H A Ddcn_3_2_1_offset.h9636 #define regDIG2_TMDS_STEREOSYNC_CTL_SEL 0x22db macro
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H A Ddcn_3_1_6_offset.h10723 #define regDIG2_TMDS_STEREOSYNC_CTL_SEL macro
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H A Ddcn_3_1_4_offset.h9980 #define regDIG2_TMDS_STEREOSYNC_CTL_SEL 0x22db macro
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H A Ddcn_3_1_5_offset.h10254 #define regDIG2_TMDS_STEREOSYNC_CTL_SEL macro
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H A Ddcn_3_1_2_offset.h10499 #define regDIG2_TMDS_STEREOSYNC_CTL_SEL macro
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