Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 (Results 1 - 10 of 10) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6702 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 0x2add macro
H A Ddpcs_4_2_0_offset.h838 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 0x2add macro
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H A Ddpcs_4_2_3_offset.h881 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 0x2add macro
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H A Ddpcs_4_2_2_offset.h845 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 0x2add macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11311 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 macro
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H A Ddcn_3_2_1_offset.h11320 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 macro
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H A Ddcn_3_1_6_offset.h12409 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 macro
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H A Ddcn_3_1_4_offset.h11166 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 macro
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H A Ddcn_3_1_5_offset.h11918 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 macro
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H A Ddcn_3_1_2_offset.h12053 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 macro
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