Searched refs:regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4040 #define regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX 2 macro
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H A Ddcn_3_2_1_offset.h4039 #define regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX 2 macro
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H A Ddcn_3_1_6_offset.h5346 #define regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX 2 macro
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H A Ddcn_3_1_4_offset.h6039 #define regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX 2 macro
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H A Ddcn_3_1_5_offset.h4885 #define regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX 2 macro
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H A Ddcn_3_1_2_offset.h5126 #define regCNVC_CFG2_CNVC_COEF_FORMAT_BASE_IDX 2 macro
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