Searched refs:regAFMT1_AFMT_MEM_PWR (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h10299 #define regAFMT1_AFMT_MEM_PWR macro
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H A Ddcn_3_2_1_offset.h10298 #define regAFMT1_AFMT_MEM_PWR macro
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H A Ddcn_3_1_6_offset.h11361 #define regAFMT1_AFMT_MEM_PWR macro
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H A Ddcn_3_1_4_offset.h9526 #define regAFMT1_AFMT_MEM_PWR 0x2187 macro
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H A Ddcn_3_1_5_offset.h10888 #define regAFMT1_AFMT_MEM_PWR macro
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H A Ddcn_3_1_2_offset.h11137 #define regAFMT1_AFMT_MEM_PWR macro
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