/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/ |
H A D | dcn201_clk_mgr.c | 80 clk_mgr->clks.p_state_change_support = true; 97 bool p_state_change_support; local 130 p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0); 131 if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_change_support)) { 132 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; 133 clk_mgr_base->clks.p_state_change_support = p_state_change_support;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/ |
H A D | dcn30_clk_mgr.c | 114 clk_mgr_base->clks.p_state_change_support = true; 208 bool p_state_change_support; local 248 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; 249 p_state_change_support = new_clocks->p_state_change_support; 252 if (dc->clk_mgr->dc_mode_softmax_enabled && safe_to_lower && !p_state_change_support) { 258 if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_change_support) || 260 clk_mgr_base->clks.p_state_change_support = p_state_change_support; [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/ |
H A D | dcn20_clk_mgr.c | 231 bool p_state_change_support; local 282 p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0); 283 if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_change_support)) { 284 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; 285 clk_mgr_base->clks.p_state_change_support = p_state_change_support; 287 pp_smu->set_pstate_handshake_support(&pp_smu->pp_smu, clk_mgr_base->clks.p_state_change_support); 407 clk_mgr->clks.p_state_change_support [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/ |
H A D | dcn32_clk_mgr.c | 163 clk_mgr_base->clks.p_state_change_support = true; 469 bool p_state_change_support; local 529 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; 538 p_state_change_support = new_clocks->p_state_change_support; 539 if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_change_support) && 541 clk_mgr_base->clks.p_state_change_support = p_state_change_support; 544 if (!clk_mgr_base->clks.p_state_change_support) { [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn30/ |
H A D | dcn30_hwseq.c | 947 if ((!dc->clk_mgr->clks.p_state_change_support || subvp_in_use || 969 bool p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support; local 975 context->bw_ctx.bw.dcn.clk.p_state_change_support = false; 996 context->bw_ctx.bw.dcn.clk.p_state_change_support = p_state_change_support;
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/openbsd-current/sys/dev/pci/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm_trace.h | 503 __field(int, p_state_change_support) 521 __entry->p_state_change_support = clk->p_state_change_support; 533 "dramclk_khz=%d p_state_change_support=%d " 546 __entry->p_state_change_support,
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn20/ |
H A D | dcn20_fpu.c | 1157 context->bw_ctx.bw.dcn.clk.p_state_change_support = 1164 context->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching; 1207 context->bw_ctx.bw.dcn.clk.p_state_change_support = true; 1235 context->bw_ctx.bw.dcn.clk.p_state_change_support, 2098 full_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support; 2102 context->bw_ctx.bw.dcn.clk.p_state_change_support = full_pstate_supported; 2110 dummy_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support; 2113 context->bw_ctx.bw.dcn.clk.p_state_change_support = false;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn31/ |
H A D | dcn31_fpu.c | 553 context->bw_ctx.bw.dcn.clk.p_state_change_support = 563 context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hubbub.c | 595 hubbub1->base.ctx->dc->clk_mgr->clks.p_state_change_support == false)
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H A D | dcn20_hwseq.c | 2133 context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/ |
H A D | dcn31_clk_mgr.c | 303 clk_mgr->clks.p_state_change_support = true;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/ |
H A D | rn_clk_mgr.c | 449 clk_mgr->clks.p_state_change_support = true;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/ |
H A D | vg_clk_mgr.c | 381 clk_mgr->clks.p_state_change_support = true;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/ |
H A D | dcn315_clk_mgr.c | 181 if (!new_clocks->p_state_change_support)
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/core/ |
H A D | amdgpu_dc.c | 4802 bool p_state_change_support; local 4813 p_state_change_support = dc->clk_mgr->clks.p_state_change_support; 4816 if (p_state_change_support) { 4826 if (p_state_change_support) {
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/ |
H A D | dc.h | 535 bool p_state_change_support; member in struct:dc_clocks
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.c | 1366 context->bw_ctx.bw.dcn.clk.p_state_change_support = 1373 context->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching; 1475 context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn32/ |
H A D | dcn32_hwseq.c | 746 clocks->p_state_change_support = true;
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