Searched refs:mmUVD_RB_SIZE (Results 1 - 12 of 12) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_6_0_d.h | 46 #define mmUVD_RB_SIZE 0x3c28 macro
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| H A D | uvd_7_0_offset.h | 98 #define mmUVD_RB_SIZE 0x0428 macro
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| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 220 #define mmUVD_RB_SIZE 0x0428 macro
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| H A D | vcn_2_0_0_offset.h | 932 #define mmUVD_RB_SIZE 0x05e8 macro
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| H A D | vcn_2_5_offset.h | 555 #define mmUVD_RB_SIZE 0x00ac macro
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| H A D | vcn_3_0_0_offset.h | 885 #define mmUVD_RB_SIZE 0x00ac macro
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| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | vcn_v2_0.c | 1088 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);
1240 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);
1959 SOC15_REG_OFFSET(UVD, i, mmUVD_RB_SIZE),
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| H A D | vcn_v3_0.c | 1265 WREG32_SOC15(VCN, i, mmUVD_RB_SIZE, ring->ring_size / 4);
1402 mmUVD_RB_SIZE),
1639 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_SIZE, ring->ring_size / 4);
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| H A D | vcn_v2_5.c | 1140 WREG32_SOC15(VCN, i, mmUVD_RB_SIZE, ring->ring_size / 4);
1315 SOC15_REG_OFFSET(VCN, i, mmUVD_RB_SIZE),
1489 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_SIZE, ring->ring_size / 4);
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| H A D | vcn_v1_0.c | 955 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);
1255 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);
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| H A D | uvd_v7_0.c | 923 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_RB_SIZE), ring->ring_size / 4);
1118 WREG32_SOC15(UVD, k, mmUVD_RB_SIZE, ring->ring_size / 4);
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| H A D | uvd_v6_0.c | 867 WREG32(mmUVD_RB_SIZE, ring->ring_size / 4);
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