Searched refs:mmOTG0_OTG_V_SYNC_A_CNTL (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4746 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
H A Ddcn_3_0_3_offset.h4101 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
H A Ddcn_1_0_offset.h6301 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
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H A Ddcn_2_1_0_offset.h7963 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
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H A Ddcn_3_0_1_offset.h6514 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
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H A Ddcn_2_0_0_offset.h8994 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
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H A Ddcn_3_0_0_offset.h8687 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
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H A Ddcn_3_0_2_offset.h7843 #define mmOTG0_OTG_V_SYNC_A_CNTL 0x1b38 macro
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