Searched refs:mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4236 #define mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R 0x147f macro
H A Ddcn_2_1_0_offset.h6388 #define mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R 0x147f macro
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H A Ddcn_3_0_1_offset.h10946 #define mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R macro
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H A Ddcn_2_0_0_offset.h7366 #define mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R 0x147f macro
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H A Ddcn_3_0_0_offset.h14519 #define mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R macro
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H A Ddcn_3_0_2_offset.h13202 #define mmMPCC_OGAM3_MPCC_OGAM_RAMA_END_CNTL1_R macro
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