Searched refs:mmDSCL3_SCL_MODE_BASE_IDX (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h3084 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
H A Ddcn_1_0_offset.h4941 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_2_1_0_offset.h5089 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_3_0_1_offset.h5437 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h6027 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_3_0_0_offset.h6016 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_3_0_2_offset.h5969 #define mmDSCL3_SCL_MODE_BASE_IDX 2 macro
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