Searched refs:intel_uncore_rmw (Results 1 - 21 of 21) sorted by relevance

/openbsd-current/sys/dev/pci/drm/i915/
H A Dintel_clock_gating.c58 intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_DE_COMPRESSED_HASH_MODE);
62 intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_EDP_PSR_FIX_RDWRAP);
65 intel_uncore_rmw(&i915->uncore, GEN8_CHICKEN_DCPR_1, 0, MASK_WAKEMEM);
71 intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE);
79 intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
85 intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
107 intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
113 intel_uncore_rmw(&i915->uncore, ILK_DPFC_CHICKEN(INTEL_FBC_A), 0, DPFC_DISABLE_DUMMY0);
145 intel_uncore_rmw(&dev_priv->uncore, DSPCNTR(pipe), 0, DISP_TRICKLE_FEED_DISABLE);
147 intel_uncore_rmw(
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H A Dvlv_suspend.c264 intel_uncore_rmw(uncore, VLV_GTLC_WAKE_CTRL, ~VLV_GTLC_ALLOWWAKEREQ,
267 intel_uncore_rmw(uncore, VLV_GTLC_SURVIVABILITY_REG, ~VLV_GFX_CLK_FORCE_ON_BIT,
308 intel_uncore_rmw(uncore, VLV_GTLC_SURVIVABILITY_REG, VLV_GFX_CLK_FORCE_ON_BIT,
334 intel_uncore_rmw(uncore, VLV_GTLC_WAKE_CTRL, VLV_GTLC_ALLOWWAKEREQ,
H A Di915_hwmon.c78 intel_uncore_rmw(uncore, reg, clear, set);
433 intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit,
446 intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit,
512 r = intel_uncore_rmw(hwmon->ddat.uncore, hwmon->rg.pkg_rapl_limit,
528 intel_uncore_rmw(hwmon->ddat.uncore, hwmon->rg.pkg_rapl_limit,
H A Di915_irq.c196 misccpctl = intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL,
291 ier = intel_uncore_rmw(&dev_priv->uncore, VLV_IER, ~0, 0);
376 ier = intel_uncore_rmw(&dev_priv->uncore, VLV_IER, ~0, 0);
1041 intel_uncore_rmw(&dev_priv->uncore, PORT_HOTPLUG_STAT, 0, 0);
1150 intel_uncore_rmw(uncore, PORT_HOTPLUG_STAT, 0, 0);
H A Di915_perf.c1026 intel_uncore_rmw(uncore, oastatus_reg,
2448 intel_uncore_rmw(uncore, GEN7_MISCCPCTL,
2450 intel_uncore_rmw(uncore, GEN6_UCGCTL1,
2462 intel_uncore_rmw(uncore, GEN6_UCGCTL1,
2464 intel_uncore_rmw(uncore, GEN7_MISCCPCTL,
2467 intel_uncore_rmw(uncore, GDT_CHICKEN_BITS, GT_NOA_ENABLE, 0);
2974 intel_uncore_rmw(uncore, GEN12_SQCNT1, 0, sqcnt1);
3008 intel_uncore_rmw(uncore, GDT_CHICKEN_BITS, GT_NOA_ENABLE, 0);
3019 intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
3047 intel_uncore_rmw(uncor
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H A Dintel_uncore.h435 static inline u32 intel_uncore_rmw(struct intel_uncore *uncore, function
/openbsd-current/sys/dev/pci/drm/i915/display/
H A Dintel_hotplug_irq.c189 intel_uncore_rmw(&dev_priv->uncore, PORT_HOTPLUG_EN, mask, bits);
559 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_DDI, 0, 0);
571 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_TC, 0, 0);
596 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG, 0, 0);
607 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG2, 0, 0);
626 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, DIGITAL_PORT_HOTPLUG_CNTRL, 0, 0);
640 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, PCH_PORT_HOTPLUG, 0, 0);
659 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, GEN11_TC_HOTPLUG_CTL, 0, 0);
670 dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, GEN11_TBT_HOTPLUG_CTL, 0, 0);
734 intel_uncore_rmw(
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H A Dintel_de.h47 return intel_uncore_rmw(&i915->uncore, reg, clear, set);
H A Dintel_display_irq.c759 psr_iir = intel_uncore_rmw(&dev_priv->uncore,
883 psr_iir = intel_uncore_rmw(&dev_priv->uncore, iir_reg, 0, 0);
953 intel_uncore_rmw(&dev_priv->uncore, DSI_INTR_IDENT_REG(port), 0, 0);
1272 intel_uncore_rmw(&dev_priv->uncore, DSI_INTR_MASK_REG(port), DSI_TE_EVENT,
1275 intel_uncore_rmw(&dev_priv->uncore, DSI_INTR_IDENT_REG(port), 0, 0);
1377 intel_uncore_rmw(uncore, PORT_HOTPLUG_STAT, 0, 0);
H A Di9xx_wm.c669 intel_uncore_rmw(&dev_priv->uncore, DSPFW3, DSPFW_CURSOR_SR_MASK,
676 intel_uncore_rmw(&dev_priv->uncore, DSPFW3, DSPFW_HPLL_SR_MASK, FW_WM(wm, HPLL_SR));
3223 intel_uncore_rmw(&dev_priv->uncore, WM_MISC, WM_MISC_DATA_PARTITION_5_6,
3227 intel_uncore_rmw(&dev_priv->uncore, DISP_ARB_CTL2, DISP_DATA_PARTITION_5_6,
3233 intel_uncore_rmw(&dev_priv->uncore, DISP_ARB_CTL, DISP_FBC_WM_DIS,
3919 intel_uncore_rmw(&dev_priv->uncore, WM3_LP_ILK, WM_LP_ENABLE, 0);
3920 intel_uncore_rmw(&dev_priv->uncore, WM2_LP_ILK, WM_LP_ENABLE, 0);
3921 intel_uncore_rmw(&dev_priv->uncore, WM1_LP_ILK, WM_LP_ENABLE, 0);
/openbsd-current/sys/dev/pci/drm/i915/gt/uc/
H A Dintel_gsc_proxy.c282 intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),
318 intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),
343 intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),
H A Dintel_guc_fw.c43 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, 0,
H A Dintel_guc_slpc.c587 intel_uncore_rmw(gt->uncore,
/openbsd-current/sys/dev/pci/drm/i915/gt/
H A Dgen6_ppgtt.c36 intel_uncore_rmw(uncore, GAC_ECO_BITS, 0, ECOBITS_PPGTT_CACHE64B);
52 intel_uncore_rmw(uncore,
57 intel_uncore_rmw(uncore,
62 intel_uncore_rmw(uncore,
H A Dintel_gt.c177 intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));
260 intel_uncore_rmw(uncore, EMR, 0, eir);
270 intel_uncore_rmw(uncore, GEN12_RING_FAULT_REG, RING_FAULT_VALID, 0);
273 intel_uncore_rmw(uncore, GEN8_RING_FAULT_REG, RING_FAULT_VALID, 0);
H A Dintel_ggtt_fencing.c911 intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);
916 intel_uncore_rmw(uncore, TILECTL, 0, TILECTL_SWZCTL);
H A Dintel_reset.c741 intel_uncore_rmw(gt->uncore,
746 intel_uncore_rmw(gt->uncore,
761 intel_uncore_rmw(gt->uncore,
H A Dintel_gt_pm_debugfs.c574 intel_uncore_rmw(gt->uncore, intel_gt_perf_limit_reasons_reg(gt),
H A Dintel_gt_irq.c342 intel_uncore_rmw(uncore, MTL_GUC_MGUC_INTR_MASK, mask, 0);
H A Dintel_gtt.c444 intel_uncore_rmw(uncore,
H A Dintel_rps.c637 intel_uncore_rmw(uncore, MEMINTREN, MEMINT_EVAL_CHG_EN, 0);

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