Searched refs:hw_data (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu8_hwmgr.c790 struct smu8_hwmgr *hw_data = hwmgr->backend; local
792 if (hw_data->is_nb_dpm_enabled) {
861 struct smu8_hwmgr *hw_data = hwmgr->backend; local
865 if (hw_data->sys_info.nb_dpm_enable) {
866 disable_switch = hw_data->cc6_settings.nb_pstate_switch_disable ? true : false;
867 enable_low_mem_state = hw_data->cc6_settings.nb_pstate_switch_disable ? false : true;
923 struct smu8_hwmgr *hw_data = hwmgr->backend; local
925 hw_data->disp_clk_bypass_pending = false;
926 hw_data->disp_clk_bypass = false;
931 struct smu8_hwmgr *hw_data local
938 struct smu8_hwmgr *hw_data = hwmgr->backend; local
1455 struct smu8_hwmgr *hw_data = hwmgr->backend; local
1490 struct smu8_hwmgr *hw_data = hwmgr->backend; local
[all...]
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c866 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
868 struct smu7_dpm_table *dpm_table = &hw_data->dpm_table;
872 uint8_t pcie_entry_cnt = (uint8_t) hw_data->dpm_table.pcie_speed_table.count;
910 hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask =
915 (hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask >> i) & 0x1;
926 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &&
927 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &
931 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &&
932 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &
937 ((hw_data
1036 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1279 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1403 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1920 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
[all...]
H A Dpolaris10_smumgr.c1038 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1040 struct smu7_dpm_table *dpm_table = &hw_data->dpm_table;
1044 uint8_t pcie_entry_cnt = (uint8_t) hw_data->dpm_table.pcie_speed_table.count;
1099 hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask =
1104 (hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask & (1 << i)) >> i;
1115 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &&
1116 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &
1120 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &&
1121 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &
1126 ((hw_data
1210 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1492 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1619 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
1916 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); local
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/gpio/
H A Dgpio_service.c541 struct hw_gpio *hw_data; local
571 hw_data = FROM_HW_GPIO_PIN(ddc->pin_data->pin);
574 config_data.config.ddc.data_en_bit_present = hw_data->store.en != 0;

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