Searched refs:gmbus (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/dev/pci/drm/i915/gvt/
H A Dedid.c134 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;
163 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;
211 i2c_edid->gmbus.total_byte_count =
215 /* vgpu gmbus only support EDID */
220 "vgpu%d: unsupported gmbus slave addr(0x%x)\n"
221 " gmbus operations will be ignored.\n",
229 i2c_edid->gmbus.cycle_type = gmbus1_bus_cycle(wvalue);
247 * visible in gmbus interface)
249 i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE;
261 i2c_edid->gmbus
[all...]
H A Dedid.h137 struct intel_vgpu_i2c_gmbus gmbus; member in struct:intel_vgpu_i2c_edid
/openbsd-current/sys/dev/pci/drm/i915/display/
H A Dintel_gmbus.c80 /* Map gmbus pin pairs to names and registers. */
488 add_wait_queue(&i915->display.gmbus.wait_queue, &wait);
499 remove_wait_queue(&i915->display.gmbus.wait_queue, &wait);
519 add_wait_queue(&i915->display.gmbus.wait_queue, &wait);
525 remove_wait_queue(&i915->display.gmbus.wait_queue, &wait);
683 * The gmbus controller can combine a 1 or 2 byte write with another read/write
768 /* Generate a STOP condition on the bus. Note that gmbus can't generata
770 * unconditionally generate the STOP condition with an additional gmbus
798 * from retrying. So return -ENXIO only when gmbus properly quiescents -
908 mutex_lock(&i915->display.gmbus
[all...]
H A Dintel_gmbus_regs.h11 #define GMBUS_MMIO_BASE(__i915) ((__i915)->display.gmbus.mmio_base)
H A Dintel_display_core.h391 * Base address of where the gmbus and gpio blocks are located
397 * gmbus.mutex protects against concurrent usage of the single
398 * hw gmbus controller on different i2c buses.
405 } gmbus; member in struct:intel_display
H A Dintel_dp_aux.c855 wake_up_all(&i915->display.gmbus.wait_queue);
H A Dintel_cdclk.c2322 * Lock aux/gmbus while we change cdclk in case those
2326 mutex_lock(&dev_priv->display.gmbus.mutex);
2331 &dev_priv->display.gmbus.mutex);
2341 mutex_unlock(&dev_priv->display.gmbus.mutex);

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