Searched refs:UvdLevel (Results 1 - 16 of 16) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c1568 table->UvdLevel[count].MinVoltage = 0;
1569 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
1570 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
1573 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc -
1575 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
1579 table->UvdLevel[count].VclkFrequency, &dividers);
1583 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
1586 table->UvdLevel[count].DclkFrequency, &dividers);
1590 table->UvdLevel[coun
[all...]
H A Dvegam_smumgr.c1324 table->UvdLevel[count].MinVoltage = 0;
1325 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
1326 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1327 table->UvdLevel[count].MinVoltage |=
1338 table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1339 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
1343 table->UvdLevel[count].VclkFrequency, &dividers);
1347 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
1350 table->UvdLevel[count].DclkFrequency, &dividers);
1354 table->UvdLevel[coun
[all...]
H A Dpolaris10_smumgr.c1537 table->UvdLevel[count].MinVoltage = 0;
1538 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
1539 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1540 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
1551 table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1552 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
1556 table->UvdLevel[count].VclkFrequency, &dividers);
1560 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
1563 table->UvdLevel[count].DclkFrequency, &dividers);
1567 table->UvdLevel[coun
[all...]
H A Dtonga_smumgr.c1324 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
1325 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1326 table->UvdLevel[count].MinVoltage.Vddc =
1329 table->UvdLevel[count].MinVoltage.VddGfx =
1333 table->UvdLevel[count].MinVoltage.Vddci =
1336 table->UvdLevel[count].MinVoltage.Phases = 1;
1341 table->UvdLevel[count].VclkFrequency,
1348 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
1351 table->UvdLevel[count].DclkFrequency, &dividers);
1356 table->UvdLevel[coun
[all...]
H A Dci_smumgr.c1530 table->UvdLevel[count].VclkFrequency =
1532 table->UvdLevel[count].DclkFrequency =
1534 table->UvdLevel[count].MinVddc =
1536 table->UvdLevel[count].MinVddcPhases = 1;
1539 table->UvdLevel[count].VclkFrequency, &dividers);
1543 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
1546 table->UvdLevel[count].DclkFrequency, &dividers);
1550 table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
1551 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);
1552 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[coun
[all...]
/openbsd-current/sys/dev/pci/drm/radeon/
H A Dsmu7_fusion.h235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Fusion_DpmTable
H A Dsmu7_discrete.h327 SMU7_Discrete_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Discrete_DpmTable
H A Dci_dpm.c2620 table->UvdLevel[count].VclkFrequency =
2622 table->UvdLevel[count].DclkFrequency =
2624 table->UvdLevel[count].MinVddc =
2626 table->UvdLevel[count].MinVddcPhases = 1;
2630 table->UvdLevel[count].VclkFrequency, false, &dividers);
2634 table->UvdLevel[count].VclkDivider = (u8)dividers.post_divider;
2638 table->UvdLevel[count].DclkFrequency, false, &dividers);
2642 table->UvdLevel[count].DclkDivider = (u8)dividers.post_divider;
2644 table->UvdLevel[count].VclkFrequency = cpu_to_be32(table->UvdLevel[coun
[all...]
H A Dkv_dpm.c722 offsetof(SMU7_Fusion_DpmTable, UvdLevel),
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/
H A Dsmu7_fusion.h226 SMU7_Fusion_UvdLevel UvdLevel[SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Fusion_DpmTable
H A Dsmu7_discrete.h328 SMU7_Discrete_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Discrete_DpmTable
H A Dsmu72_discrete.h270 SMU72_Discrete_UvdLevel UvdLevel[SMU72_MAX_LEVELS_UVD]; member in struct:SMU72_Discrete_DpmTable
H A Dsmu74_discrete.h287 SMU74_Discrete_UvdLevel UvdLevel[SMU74_MAX_LEVELS_UVD]; member in struct:SMU74_Discrete_DpmTable
H A Dsmu75_discrete.h292 SMU75_Discrete_UvdLevel UvdLevel [SMU75_MAX_LEVELS_UVD]; member in struct:SMU75_Discrete_DpmTable
H A Dsmu73_discrete.h244 SMU73_Discrete_UvdLevel UvdLevel[SMU73_MAX_LEVELS_UVD]; member in struct:SMU73_Discrete_DpmTable
/openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/
H A Damdgpu_kv_dpm.c953 offsetof(SMU7_Fusion_DpmTable, UvdLevel),

Completed in 303 milliseconds