/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 1568 table->UvdLevel[count].MinVoltage = 0; 1569 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; 1570 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; 1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1573 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - 1575 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1579 table->UvdLevel[count].VclkFrequency, ÷rs); 1583 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; 1586 table->UvdLevel[count].DclkFrequency, ÷rs); 1590 table->UvdLevel[coun [all...] |
H A D | vegam_smumgr.c | 1324 table->UvdLevel[count].MinVoltage = 0; 1325 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; 1326 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; 1327 table->UvdLevel[count].MinVoltage |= 1338 table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; 1339 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1343 table->UvdLevel[count].VclkFrequency, ÷rs); 1347 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; 1350 table->UvdLevel[count].DclkFrequency, ÷rs); 1354 table->UvdLevel[coun [all...] |
H A D | polaris10_smumgr.c | 1537 table->UvdLevel[count].MinVoltage = 0; 1538 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; 1539 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; 1540 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1551 table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; 1552 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1556 table->UvdLevel[count].VclkFrequency, ÷rs); 1560 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; 1563 table->UvdLevel[count].DclkFrequency, ÷rs); 1567 table->UvdLevel[coun [all...] |
H A D | tonga_smumgr.c | 1324 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk; 1325 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; 1326 table->UvdLevel[count].MinVoltage.Vddc = 1329 table->UvdLevel[count].MinVoltage.VddGfx = 1333 table->UvdLevel[count].MinVoltage.Vddci = 1336 table->UvdLevel[count].MinVoltage.Phases = 1; 1341 table->UvdLevel[count].VclkFrequency, 1348 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; 1351 table->UvdLevel[count].DclkFrequency, ÷rs); 1356 table->UvdLevel[coun [all...] |
H A D | ci_smumgr.c | 1530 table->UvdLevel[count].VclkFrequency = 1532 table->UvdLevel[count].DclkFrequency = 1534 table->UvdLevel[count].MinVddc = 1536 table->UvdLevel[count].MinVddcPhases = 1; 1539 table->UvdLevel[count].VclkFrequency, ÷rs); 1543 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider; 1546 table->UvdLevel[count].DclkFrequency, ÷rs); 1550 table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider; 1551 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); 1552 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[coun [all...] |
/openbsd-current/sys/dev/pci/drm/radeon/ |
H A D | smu7_fusion.h | 235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Fusion_DpmTable
|
H A D | smu7_discrete.h | 327 SMU7_Discrete_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Discrete_DpmTable
|
H A D | ci_dpm.c | 2620 table->UvdLevel[count].VclkFrequency = 2622 table->UvdLevel[count].DclkFrequency = 2624 table->UvdLevel[count].MinVddc = 2626 table->UvdLevel[count].MinVddcPhases = 1; 2630 table->UvdLevel[count].VclkFrequency, false, ÷rs); 2634 table->UvdLevel[count].VclkDivider = (u8)dividers.post_divider; 2638 table->UvdLevel[count].DclkFrequency, false, ÷rs); 2642 table->UvdLevel[count].DclkDivider = (u8)dividers.post_divider; 2644 table->UvdLevel[count].VclkFrequency = cpu_to_be32(table->UvdLevel[coun [all...] |
H A D | kv_dpm.c | 722 offsetof(SMU7_Fusion_DpmTable, UvdLevel),
|
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/inc/ |
H A D | smu7_fusion.h | 226 SMU7_Fusion_UvdLevel UvdLevel[SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Fusion_DpmTable
|
H A D | smu7_discrete.h | 328 SMU7_Discrete_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; member in struct:SMU7_Discrete_DpmTable
|
H A D | smu72_discrete.h | 270 SMU72_Discrete_UvdLevel UvdLevel[SMU72_MAX_LEVELS_UVD]; member in struct:SMU72_Discrete_DpmTable
|
H A D | smu74_discrete.h | 287 SMU74_Discrete_UvdLevel UvdLevel[SMU74_MAX_LEVELS_UVD]; member in struct:SMU74_Discrete_DpmTable
|
H A D | smu75_discrete.h | 292 SMU75_Discrete_UvdLevel UvdLevel [SMU75_MAX_LEVELS_UVD]; member in struct:SMU75_Discrete_DpmTable
|
H A D | smu73_discrete.h | 244 SMU73_Discrete_UvdLevel UvdLevel[SMU73_MAX_LEVELS_UVD]; member in struct:SMU73_Discrete_DpmTable
|
/openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/ |
H A D | amdgpu_kv_dpm.c | 953 offsetof(SMU7_Fusion_DpmTable, UvdLevel),
|