Lines Matching refs:UvdLevel
1324 table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
1325 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1326 table->UvdLevel[count].MinVoltage.Vddc =
1329 table->UvdLevel[count].MinVoltage.VddGfx =
1333 table->UvdLevel[count].MinVoltage.Vddci =
1336 table->UvdLevel[count].MinVoltage.Phases = 1;
1341 table->UvdLevel[count].VclkFrequency,
1348 table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
1351 table->UvdLevel[count].DclkFrequency, ÷rs);
1356 table->UvdLevel[count].DclkDivider =
1359 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);
1360 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency);