Searched refs:SDMA2_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma2/
H A Dsdma2_4_2_2_sh_mask.h795 #define SDMA2_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT 0x14 macro
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h6074 #define SDMA2_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT 0x14 macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_sh_mask.h39208 #define SDMA2_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT macro
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