| /openbsd-current/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ReturnProtectorLowering.cpp | 48 X86::RSP); member in class:X86
60 X86::RSP); member in class:X86
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| H A D | X86LoadValueInjectionRetHardening.cpp | 93 // from RSP to assert that RSP points to a valid page. The write to RSP
99 X86::RSP, false, 0) member in class:X86
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| H A D | X86RetClean.cpp | 83 Register SPReg = Is64Bit ? X86::RSP : X86::ESP;
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| H A D | X86RegisterInfo.cpp | 68 StackPtr = Use64BitReg ? X86::RSP : X86::ESP;
545 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP))
668 if (TRI.isSuperOrSubRegisterEq(X86::RSP, PhysReg))
907 if (!Uses.count(CS) && CS != X86::RIP && CS != X86::RSP && CS != X86::ESP)
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| H A D | X86IndirectThunks.cpp | 253 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP;
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| H A D | X86FrameLowering.cpp | 296 // Load new SP from the top of the stack into RSP.
888 // We need to exit with RSP modified by this amount and execute suitable
890 // All stack probing must be done without modifying RSP.
895 // CopyReg = RSP
908 // RSP = RSP - RAX
983 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
987 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
1000 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
1034 // final RSP valu
[all...] |
| H A D | X86SpeculativeLoadHardening.cpp | 1543 auto OrI = BuildMI(MBB, InsertPt, Loc, TII->get(X86::OR64rr), X86::RSP)
1544 .addReg(X86::RSP)
1561 .addReg(X86::RSP);
1590 } else if (BaseMO.getReg() == X86::RSP) {
1593 // explicit RSP register as the base.
1595 "Explicit RSP access with dynamic index!");
1597 dbgs() << " Cannot harden base of explicit RSP offset in a load!");
2022 // pointers canonical) and merge it into RSP. This will allow the caller to
2151 .addReg(/*Base*/ X86::RSP)
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| H A D | X86FixupLEAs.cpp | 577 if (UseLEAForSP && (DestReg == X86::ESP || DestReg == X86::RSP))
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| H A D | X86InstrInfo.cpp | 1351 // LEA can't handle RSP.
9676 if (MI.modifiesRegister(X86::RSP, &RI) || MI.readsRegister(X86::RSP, &RI) ||
9677 MI.getDesc().hasImplicitUseOfPhysReg(X86::RSP) ||
9678 MI.getDesc().hasImplicitDefOfPhysReg(X86::RSP))
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| H A D | X86ISelDAGToDAG.cpp | 392 (RegNode->getReg() == X86::RSP))
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| H A D | X86ISelLowering.cpp | [all...] |
| /openbsd-current/gnu/usr.bin/binutils/gdb/ |
| H A D | amd64-linux-nat.c | 62 RBP * 8, RSP * 8, /* %rbp, %rsp */
88 RSP * 8, RBP * 8, /* %esp, %ebp */
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| /openbsd-current/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | FixupStatepointCallerSaved.cpp | 184 RegSlotPair RSP(Reg, FI);
185 auto Res = Reloads[MBB].insert(RSP);
192 RegSlotPair RSP(Reg, FI);
193 return Reloads.count(MBB) && Reloads[MBB].count(RSP);
246 for (auto &RSP : GlobalIndices[EHPad])
247 ReservedSlots.insert(RSP.second);
257 Vec, [Reg](RegSlotPair &RSP) { return Reg == RSP.first; });
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| /openbsd-current/gnu/usr.bin/binutils/gdb/gdbserver/ |
| H A D | linux-x86-64-low.c | 61 RSI * 8, RDI * 8, RBP * 8, RSP * 8,
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| /openbsd-current/gnu/llvm/llvm/tools/llvm-exegesis/lib/X86/ |
| H A D | Target.cpp | 465 .addReg(X86::RSP)
466 .addReg(X86::RSP)
475 .addReg(X86::RSP) // BaseReg
489 .addReg(X86::RSP) // BaseReg
499 .addReg(X86::RSP)
500 .addReg(X86::RSP)
551 .addReg(X86::RSP) // BaseReg
567 .addReg(X86::RSP) // BaseReg
588 .addReg(X86::RSP) // BaseReg
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| /openbsd-current/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 263 {codeview::RegisterId::RSP, X86::RSP},
454 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP;
759 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
787 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
824 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
860 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
896 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
897 return X86::RSP;
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| H A D | X86MCCodeEmitter.cpp | 479 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
543 assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP &&
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| /openbsd-current/gnu/llvm/llvm/lib/DebugInfo/CodeView/ |
| H A D | SymbolRecordMapping.cpp | 511 case EncodedFramePtrReg::StackPtr: return RegisterId::RSP;
546 case RegisterId::RSP:
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| /openbsd-current/gnu/llvm/lldb/source/Plugins/SymbolFile/NativePDB/ |
| H A D | CodeViewRegisterMapping.cpp | 552 lldb_rsp_x86_64, // RSP
718 case llvm::codeview::RegisterId::RSP:
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| /openbsd-current/gnu/llvm/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 192 ENTRY(RSP) \
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| /openbsd-current/gnu/llvm/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 1322 IndexReg == X86::ESP || IndexReg == X86::RSP) {
2595 if (Scale == 0 && BaseReg != X86::ESP && BaseReg != X86::RSP &&
2596 (IndexReg == X86::ESP || IndexReg == X86::RSP))
3963 is64BitMode() ? X86::RSP : (Parse32 ? X86::ESP : X86::SP);
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| /openbsd-current/gnu/usr.bin/binutils/include/opcode/ |
| H A D | h8300.h | 149 RSP = SRC | L_P | REG, enumerator in enum:h8_flags
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| /openbsd-current/gnu/usr.bin/binutils-2.17/include/opcode/ |
| H A D | h8300.h | 150 RSP = SRC | L_P | REG, enumerator in enum:h8_flags
|