Searched refs:ROTL (Results 1 - 25 of 41) sorted by relevance

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/openbsd-current/usr.sbin/nsd/
H A Dsiphash.c26 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
47 v1 = ROTL(v1, 13); \
49 v0 = ROTL(v0, 32); \
51 v3 = ROTL(v3, 16); \
54 v3 = ROTL(v3, 21); \
57 v1 = ROTL(v1, 17); \
59 v2 = ROTL(v2, 32); \
/openbsd-current/sbin/unwind/libunbound/util/
H A Dsiphash.c38 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
59 v1 = ROTL(v1, 13); \
61 v0 = ROTL(v0, 32); \
63 v3 = ROTL(v3, 16); \
66 v3 = ROTL(v3, 21); \
69 v1 = ROTL(v1, 17); \
71 v2 = ROTL(v2, 32); \
/openbsd-current/usr.sbin/unbound/util/
H A Dsiphash.c38 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
59 v1 = ROTL(v1, 13); \
61 v0 = ROTL(v0, 32); \
63 v3 = ROTL(v3, 16); \
66 v3 = ROTL(v3, 21); \
69 v1 = ROTL(v1, 17); \
71 v2 = ROTL(v2, 32); \
/openbsd-current/lib/libcrypto/cast/
H A Dcast_local.h148 #define ROTL(a,n) ((((a)<<(n))&0xffffffffL)|((a)>>((32-(n))&31))) macro
163 t=ROTL(t,i); \
180 w=ROTL(w,i); \
200 t=ROTL(t,(key[n*2+1])); \
/openbsd-current/gnu/usr.bin/perl/cpan/Digest-SHA/src/
H A Dsha.c32 #define ROTL(x, n) (SL32(x, n) | SR32(x, 32-(n))) macro
104 e += ROTL(a, 5) + f(b, c, d) + k + w; \
105 b = ROTL(b, 30)
118 #define A1(s) (W11(s) = ROTL(W11(s) ^ W12(s) ^ W13(s) ^ W14(s), 1))
/openbsd-current/gnu/llvm/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h694 ROTL, enumerator in enum:llvm::ISD::NodeType
/openbsd-current/gnu/llvm/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3344 { ISD::ROTL, MVT::v32i16, { 1, 1, 1, 1 } },
3345 { ISD::ROTL, MVT::v16i16, { 1, 1, 1, 1 } },
3346 { ISD::ROTL, MVT::v8i16, { 1, 1, 1, 1 } },
3420 { ISD::ROTL, MVT::v32i16, { 2, 8, 6, 8 } },
3421 { ISD::ROTL, MVT::v16i16, { 2, 8, 6, 7 } },
3422 { ISD::ROTL, MVT::v8i16, { 2, 7, 6, 7 } },
3423 { ISD::ROTL, MVT::v64i8, { 5, 6, 11, 12 } },
3424 { ISD::ROTL, MVT::v32i8, { 5, 15, 7, 10 } },
3425 { ISD::ROTL, MVT::v16i8, { 5, 15, 7, 10 } },
3478 { ISD::ROTL, MV
[all...]
/openbsd-current/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp98 setOperationAction(ISD::ROTL, MVT::i8, Custom);
99 setOperationAction(ISD::ROTL, MVT::i16, Expand);
350 case ISD::ROTL: {
377 case ISD::ROTL:
951 case ISD::ROTL:
/openbsd-current/lib/libcrypto/bn/asm/
H A Dppc.pl126 $ROTL= "rotlwi"; # rotate left by immediate
150 $ROTL= "rotldi"; # rotate left by immediate
1695 $ROTL r3,r11,`$BITS/2` # rotate by $BITS/2 and store in r3
/openbsd-current/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp111 setOperationAction(ISD::ROTL, VT, Expand);
/openbsd-current/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp62 setOperationAction(ISD::ROTL, GRLenVT, Expand);
93 setOperationAction(ISD::ROTL, MVT::i32, Custom);
983 case ISD::ROTL:
1043 case ISD::ROTL:
/openbsd-current/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp258 case ISD::ROTL: return "rotl";
H A DLegalizeVectorOps.cpp340 case ISD::ROTL:
846 case ISD::ROTL:
H A DLegalizeIntegerTypes.cpp269 case ISD::ROTL:
1685 case ISD::ROTL:
2560 case ISD::ROTL:
4746 unsigned Opcode = N->getOpcode() == ISD::ROTL ? ISD::FSHL : ISD::FSHR;
4844 case ISD::ROTL:
H A DTargetLowering.cpp2032 case ISD::ROTL:
2036 bool IsROTL = (Op.getOpcode() == ISD::ROTL);
3373 case ISD::ROTL:
4101 if (X.getOpcode() == ISD::ROTL || X.getOpcode() == ISD::ROTR)
7605 bool IsLeft = Node->getOpcode() == ISD::ROTL;
7614 unsigned RevRot = IsLeft ? ISD::ROTR : ISD::ROTL;
8624 return DAG.getNode(ISD::ROTL, dl, VT, Op, DAG.getConstant(8, dl, SHVT));
H A DDAGCombiner.cpp1738 case ISD::ROTL: return visitRotate(N);
6983 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT))
6984 return DAG.getNode(ISD::ROTL, DL, VT, BSwap, ShAmt);
7670 bool HasROTL = hasOperation(ISD::ROTL, VT);
7680 HasROTL |= TLI.getOperationAction(ISD::ROTL, VT) == TargetLowering::Custom;
7809 SDValue RotX = DAG.getNode(ISD::ROTL, DL, VT, X, LHSShiftAmt);
7814 SDValue RotX = DAG.getNode(ISD::ROTL, DL, VT, X, LHSShiftAmt);
7836 Res = DAG.getNode(UseROTL ? ISD::ROTL : ISD::ROTR, DL, VT, LHSShiftArg,
7875 RExtOp0, HasROTL, ISD::ROTL, ISD::ROTR, DL);
7881 LExtOp0, HasROTR, ISD::ROTR, ISD::ROTL, D
[all...]
H A DSelectionDAG.cpp4256 case ISD::ROTL:
4740 case ISD::ROTL:
5649 case ISD::ROTL: return C1.rotl(C2);
6270 case ISD::ROTL:
11442 case ISD::ROTL:
/openbsd-current/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1581 ISD::SDIVREM, ISD::UDIVREM, ISD::ROTL, ISD::ROTR,
1630 ISD::AND, ISD::OR, ISD::XOR, ISD::ROTL, ISD::ROTR,
1799 setOperationAction(ISD::ROTL, MVT::i32, Legal);
1800 setOperationAction(ISD::ROTL, MVT::i64, Legal);
3353 case ISD::ROTL: return LowerROTL(Op, DAG);
/openbsd-current/gnu/llvm/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp81 setOperationAction(ISD::ROTL, MVT::i8, Expand);
83 setOperationAction(ISD::ROTL, MVT::i16, Expand);
/openbsd-current/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp839 case ISD::ROTL: {
1573 case ISD::ROTL:
/openbsd-current/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp120 setOperationAction(ISD::ROTL, MVT::i32, Expand);
/openbsd-current/gnu/llvm/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp448 // TODO: we may consider expanding ROTL/ROTR on older GPUs. Currently on GPUs
451 setOperationAction(ISD::ROTL, MVT::i64, Legal);
453 setOperationAction(ISD::ROTL, MVT::i32, Legal);
456 setOperationAction(ISD::ROTL, MVT::i16, Expand);
458 setOperationAction(ISD::ROTL, MVT::i8, Expand);
/openbsd-current/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp106 setOperationAction(ISD::ROTL , MVT::i32, Expand);
/openbsd-current/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp692 } else if (Opcode == ISD::ROTL) {
1479 case ISD::ROTL:
3951 case ISD::ROTL:
4814 if (isRunOfOnes(Imm, MB, ME) && Val.getOpcode() != ISD::ROTL) {
/openbsd-current/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1715 setOperationAction(ISD::ROTL , MVT::i64, Expand);
1781 setOperationAction(ISD::ROTL , MVT::i32, Expand);

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