Searched refs:PWR_PCC_CONTROL__PCC_POLARITY_MASK (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_1_sh_mask.h3663 #define PWR_PCC_CONTROL__PCC_POLARITY_MASK 0x1 macro
H A Dsmu_7_1_3_sh_mask.h4689 #define PWR_PCC_CONTROL__PCC_POLARITY_MASK 0x1 macro
H A Dsmu_7_1_2_sh_mask.h4785 #define PWR_PCC_CONTROL__PCC_POLARITY_MASK 0x1 macro

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