Searched refs:LE_CSR0 (Results 1 - 7 of 7) sorted by relevance

/openbsd-current/sys/arch/luna88k/stand/boot/
H A Dlance.c150 lereg->ler_rap = LE_CSR0;
194 lereg->ler_rap = LE_CSR0;
215 lereg->ler_rap = LE_CSR0;
221 lereg->ler_rap = LE_CSR0;
250 lereg->ler_rap = LE_CSR0;
262 lereg->ler_rap = LE_CSR0;
293 lereg->ler_rap = LE_CSR0;
299 lereg->ler_rap = LE_CSR0;
308 lereg->ler_rap = LE_CSR0;
323 lereg->ler_rap = LE_CSR0;
[all...]
/openbsd-current/sys/dev/ic/
H A Dlance.c266 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_STOP);
280 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_STOP);
300 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INIT);
304 if ((*sc->sc_rdcsr)(sc, LE_CSR0) & LE_C0_IDON)
307 if ((*sc->sc_rdcsr)(sc, LE_CSR0) & LE_C0_IDON) {
309 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_STRT);
H A Dam7990.c384 isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0;
399 (*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~LE_C0_INEA);
400 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA);
525 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_TDMD);
553 (*sc->sc_rdcsr)(sc, LE_CSR0));
578 (*sc->sc_rdcsr)(sc, LE_CSR0));
H A Dam79900.c411 isr = (*sc->sc_rdcsr)(sc, LE_CSR0) | sc->sc_saved_csr0;
421 (*sc->sc_wrcsr)(sc, LE_CSR0,
549 (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_TDMD);
577 (*sc->sc_rdcsr)(sc, LE_CSR0));
601 (*sc->sc_rdcsr)(sc, LE_CSR0));
H A Dlancereg.h135 #define LE_CSR0 0x0000 /* Control and status register */ macro
/openbsd-current/sys/dev/isa/
H A Dif_le_isa.c285 le_isa_wrcsr(sc, LE_CSR0, LE_C0_STOP);
288 if (le_isa_rdcsr(sc, LE_CSR0) != LE_C0_STOP)
/openbsd-current/sys/dev/pci/
H A Dif_pcn.c929 pcn_csr_write(sc, LE_CSR0, LE_C0_INEA|LE_C0_TDMD);
1056 csr0 = pcn_csr_read(sc, LE_CSR0);
1061 pcn_csr_write(sc, LE_CSR0, csr0 &
1606 pcn_csr_write(sc, LE_CSR0, LE_C0_INIT);
1609 if (pcn_csr_read(sc, LE_CSR0) & LE_C0_IDON)
1625 pcn_csr_write(sc, LE_CSR0, LE_C0_INEA|LE_C0_STRT|LE_C0_IDON);
1689 pcn_csr_write(sc, LE_CSR0, LE_C0_STOP);

Completed in 263 milliseconds