Searched refs:LCAC_MC5_OVR_SEL__MC5_OVR_SEL__SHIFT (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h243 #define LCAC_MC5_OVR_SEL__MC5_OVR_SEL__SHIFT 0x00000000 macro
H A Dsmu_7_1_3_sh_mask.h5774 #define LCAC_MC5_OVR_SEL__MC5_OVR_SEL__SHIFT 0x0 macro

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