Searched refs:EVERGREEN_CRTC_CONTROL (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Dradeon_device.c689 reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) |
690 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);
692 reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) |
693 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET);
696 reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) |
697 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET);
H A Devergreen_reg.h233 #define EVERGREEN_CRTC_CONTROL 0x6e70 macro
H A Devergreen.c1383 if (!(RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN))
1684 tmp = RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset);
1686 WREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);
1709 tmp = RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset);
1711 WREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);
2681 crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & EVERGREEN_CRTC_MASTER_EN;
2694 tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
2699 WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
2723 tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
2725 WREG32(EVERGREEN_CRTC_CONTROL
[all...]
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsid.h2016 #define EVERGREEN_CRTC_CONTROL 0x1b9c macro
2352 #define EVERGREEN_CRTC_CONTROL 0x1b9c macro

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