Searched refs:DfPstateTable (Results 1 - 18 of 18) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c578 if (is_valid_clock_value(clock_table->DfPstateTable[i].FClk) &&
579 clock_table->DfPstateTable[i].FClk > max_fclk) {
580 max_fclk = clock_table->DfPstateTable[i].FClk;
600 uint32_t min_fclk = clock_table->DfPstateTable[0].FClk;
604 if (is_valid_clock_value(clock_table->DfPstateTable[j].FClk) &&
605 clock_table->DfPstateTable[j].FClk < min_fclk &&
606 clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i]) {
607 min_fclk = clock_table->DfPstateTable[j].FClk;
623 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[min_pstate].MemClk;
624 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[min_pstat
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H A Ddcn314_smu.h57 DfPstateTable314_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon261
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h77 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon265
H A Ddcn315_clk_mgr.c495 if (clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i])
511 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[max_pstate].FClk;
512 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk;
523 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[0].FClk;
524 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[0].MemClk;
525 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[0].Voltage;
707 DC_LOG_SMU("smu_dpm_clks.dpm_clks.DfPstateTable[%d].FClk = %d\n"
708 "smu_dpm_clks.dpm_clks->DfPstateTable[%d].MemClk= %d\n"
709 "smu_dpm_clks.dpm_clks->DfPstateTable[%d].Voltage = %d\n",
710 i, smu_dpm_clks.dpm_clks->DfPstateTable[
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/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_5.h118 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon627
H A Dsmu13_driver_if_v13_0_4.h130 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon618
H A Dsmu11_driver_if_vangogh.h138 df_pstate_t DfPstateTable[NUM_FCLK_DPM_LEVELS]; member in struct:__anon506
H A Dsmu13_driver_if_yellow_carp.h129 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon722
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c493 if (clock_table->DfPstateTable[i].FClk != 0) {
519 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk;
520 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk;
521 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage;
522 switch (clock_table->DfPstateTable[j].WckRatio) {
532 temp = find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->DfPstateTable[j].Voltage);
535 temp = find_clk_for_voltage(clock_table, clock_table->SocClocks, clock_table->DfPstateTable[j].Voltage);
H A Ddcn316_smu.h85 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon270
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c570 if (clock_table->DfPstateTable[i].FClk != 0) {
594 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk;
595 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk;
596 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage;
597 switch (clock_table->DfPstateTable[j].WckRatio) {
607 bw_params->clk_table.entries[i].dcfclk_mhz = find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->DfPstateTable[j].Voltage);
608 bw_params->clk_table.entries[i].socclk_mhz = find_clk_for_voltage(clock_table, clock_table->SocClocks, clock_table->DfPstateTable[j].Voltage);
780 DC_LOG_SMU("smu_dpm_clks.dpm_clks.DfPstateTable[%d].FClk = %d\n"
781 "smu_dpm_clks.dpm_clks->DfPstateTable[%d].MemClk= %d\n"
782 "smu_dpm_clks.dpm_clks->DfPstateTable[
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H A Ddcn31_smu.h138 DfPstateTable_t DfPstateTable[NUM_DF_PSTATE_LEVELS]; member in struct:__anon257
/openbsd-current/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.h109 df_pstate_t DfPstateTable[VG_NUM_FCLK_DPM_LEVELS]; member in struct:vg_dpm_clocks
H A Dvg_clk_mgr.c572 if (clock_table->DfPstateTable[i].fclk != 0) {
587 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk;
588 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk;
589 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage;
590 bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfPstateTable[j].voltage);
592 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk;
593 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk;
594 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage;
628 .DfPstateTable = {
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c576 *freq = clk_table->DfPstateTable[dpm_level].memclk;
582 *freq = clk_table->DfPstateTable[dpm_level].fclk;
2231 clock_table->FClocks[i].Freq = table->DfPstateTable[i].fclk;
2232 clock_table->FClocks[i].Vol = table->DfPstateTable[i].voltage;
2236 clock_table->MemClocks[i].Freq = table->DfPstateTable[i].memclk;
2237 clock_table->MemClocks[i].Vol = table->DfPstateTable[i].voltage;
/openbsd-current/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c676 *freq = clk_table->DfPstateTable[dpm_level].MemClk;
681 *freq = clk_table->DfPstateTable[dpm_level].FClk;
H A Dsmu_v13_0_4_ppt.c454 *freq = clk_table->DfPstateTable[dpm_level].MemClk;
459 *freq = clk_table->DfPstateTable[dpm_level].FClk;
H A Dyellow_carp_ppt.c810 *freq = clk_table->DfPstateTable[dpm_level].MemClk;
815 *freq = clk_table->DfPstateTable[dpm_level].FClk;

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