Searched refs:t3_read_reg (Results 1 - 8 of 8) sorted by relevance
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/cxgb3/ |
H A D | xgmac.c | 61 t3_read_reg(adap, ctrl); 103 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 135 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 157 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 170 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 180 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 239 u32 v = t3_read_reg(mac->adapter, reg); 242 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */ 250 u32 v = t3_read_reg(mac->adapter, reg); 253 t3_read_reg(ma [all...] |
H A D | t3_hw.c | 57 u32 val = t3_read_reg(adapter, reg); 104 u32 v = t3_read_reg(adapter, addr) & ~mask; 107 t3_read_reg(adapter, addr); /* flush */ 128 *vals++ = t3_read_reg(adap, data_reg); 166 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP); 168 val = t3_read_reg(adap, 173 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1); 175 val64 = t3_read_reg(adap, 224 *valp = t3_read_reg(adapter, A_MI1_DATA); 271 *valp = t3_read_reg(adapte [all...] |
H A D | ael1002.c | 221 status = t3_read_reg(phy->adapter, 223 t3_read_reg(phy->adapter, 225 t3_read_reg(phy->adapter, 227 t3_read_reg(phy->adapter,
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H A D | mc5.c | 119 *v1 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA0); 120 *v2 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA1); 121 *v3 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA2); 151 unsigned int server_base = t3_read_reg(adap, A_MC5_DB_SERVER_INDEX); 338 cfg = t3_read_reg(adap, A_MC5_DB_CONFIG) & ~F_TMMODE; 424 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE); 465 u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG);
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H A D | cxgb3_offload.c | 191 uiip->llimit = t3_read_reg(adapter, A_ULPRX_ISCSI_LLIMIT); 192 uiip->ulimit = t3_read_reg(adapter, A_ULPRX_ISCSI_ULIMIT); 193 uiip->tagmask = t3_read_reg(adapter, A_ULPRX_ISCSI_TAGMASK); 199 t3_read_reg(adapter, A_PM1_TX_CFG) >> 17); 232 t3_read_reg(adapter, A_ULPTX_TPT_LLIMIT); 233 req->tpt_top = t3_read_reg(adapter, A_ULPTX_TPT_ULIMIT); 235 t3_read_reg(adapter, A_ULPTX_PBL_LLIMIT); 236 req->pbl_top = t3_read_reg(adapter, A_ULPTX_PBL_ULIMIT); 237 req->rqt_base = t3_read_reg(adapter, A_ULPRX_RQ_LLIMIT); 238 req->rqt_top = t3_read_reg(adapte [all...] |
H A D | adapter.h | 233 static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr) function
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H A D | sge.c | 2335 t3_read_reg(adap, A_PL_CLI); /* flush */ 2365 map = t3_read_reg(adap, A_SG_DATA_INTR); 2400 map = t3_read_reg(adap, A_SG_DATA_INTR); 2455 unsigned int v, status = t3_read_reg(adapter, A_SG_INT_CAUSE); 2461 v = t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS); 2514 u32 status = t3_read_reg(adap, A_SG_RSPQ_FL_STATUS);
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H A D | cxgb3_main.c | 565 v = t3_read_reg(adap, A_TP_TM_PIO_DATA); 1201 *p++ = t3_read_reg(ap, start);
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