1/* 2 * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33/* This file should not be included directly. Include common.h instead. */ 34 35#ifndef __T3_ADAPTER_H__ 36#define __T3_ADAPTER_H__ 37 38#include <linux/pci.h> 39#include <linux/spinlock.h> 40#include <linux/interrupt.h> 41#include <linux/timer.h> 42#include <linux/cache.h> 43#include <linux/mutex.h> 44#include "t3cdev.h" 45#include <asm/semaphore.h> 46#include <asm/bitops.h> 47#include <asm/io.h> 48 49typedef irqreturn_t(*intr_handler_t) (int, void *); 50 51struct vlan_group; 52 53struct port_info { 54 struct vlan_group *vlan_grp; 55 const struct port_type_info *port_type; 56 u8 port_id; 57 u8 rx_csum_offload; 58 u8 nqsets; 59 u8 first_qset; 60 struct cphy phy; 61 struct cmac mac; 62 struct link_config link_config; 63 struct net_device_stats netstats; 64 int activity; 65}; 66 67enum { /* adapter flags */ 68 FULL_INIT_DONE = (1 << 0), 69 USING_MSI = (1 << 1), 70 USING_MSIX = (1 << 2), 71 QUEUES_BOUND = (1 << 3), 72}; 73 74struct rx_desc; 75struct rx_sw_desc; 76 77struct sge_fl_page { 78 struct skb_frag_struct frag; 79 unsigned char *va; 80}; 81 82struct sge_fl { /* SGE per free-buffer list state */ 83 unsigned int buf_size; /* size of each Rx buffer */ 84 unsigned int credits; /* # of available Rx buffers */ 85 unsigned int size; /* capacity of free list */ 86 unsigned int cidx; /* consumer index */ 87 unsigned int pidx; /* producer index */ 88 unsigned int gen; /* free list generation */ 89 unsigned int cntxt_id; /* SGE context id for the free list */ 90 struct sge_fl_page page; 91 struct rx_desc *desc; /* address of HW Rx descriptor ring */ 92 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */ 93 dma_addr_t phys_addr; /* physical address of HW ring start */ 94 unsigned long empty; /* # of times queue ran out of buffers */ 95 unsigned long alloc_failed; /* # of times buffer allocation failed */ 96}; 97 98/* 99 * Bundle size for grouping offload RX packets for delivery to the stack. 100 * Don't make this too big as we do prefetch on each packet in a bundle. 101 */ 102# define RX_BUNDLE_SIZE 8 103 104struct rsp_desc; 105 106struct sge_rspq { /* state for an SGE response queue */ 107 unsigned int credits; /* # of pending response credits */ 108 unsigned int size; /* capacity of response queue */ 109 unsigned int cidx; /* consumer index */ 110 unsigned int gen; /* current generation bit */ 111 unsigned int polling; /* is the queue serviced through NAPI? */ 112 unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */ 113 unsigned int next_holdoff; /* holdoff time for next interrupt */ 114 struct rsp_desc *desc; /* address of HW response ring */ 115 dma_addr_t phys_addr; /* physical address of the ring */ 116 unsigned int cntxt_id; /* SGE context id for the response q */ 117 spinlock_t lock; /* guards response processing */ 118 struct sk_buff *rx_head; /* offload packet receive queue head */ 119 struct sk_buff *rx_tail; /* offload packet receive queue tail */ 120 121 unsigned long offload_pkts; 122 unsigned long offload_bundles; 123 unsigned long eth_pkts; /* # of ethernet packets */ 124 unsigned long pure_rsps; /* # of pure (non-data) responses */ 125 unsigned long imm_data; /* responses with immediate data */ 126 unsigned long rx_drops; /* # of packets dropped due to no mem */ 127 unsigned long async_notif; /* # of asynchronous notification events */ 128 unsigned long empty; /* # of times queue ran out of credits */ 129 unsigned long nomem; /* # of responses deferred due to no mem */ 130 unsigned long unhandled_irqs; /* # of spurious intrs */ 131 unsigned long starved; 132 unsigned long restarted; 133}; 134 135struct tx_desc; 136struct tx_sw_desc; 137 138struct sge_txq { /* state for an SGE Tx queue */ 139 unsigned long flags; /* HW DMA fetch status */ 140 unsigned int in_use; /* # of in-use Tx descriptors */ 141 unsigned int size; /* # of descriptors */ 142 unsigned int processed; /* total # of descs HW has processed */ 143 unsigned int cleaned; /* total # of descs SW has reclaimed */ 144 unsigned int stop_thres; /* SW TX queue suspend threshold */ 145 unsigned int cidx; /* consumer index */ 146 unsigned int pidx; /* producer index */ 147 unsigned int gen; /* current value of generation bit */ 148 unsigned int unacked; /* Tx descriptors used since last COMPL */ 149 struct tx_desc *desc; /* address of HW Tx descriptor ring */ 150 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */ 151 spinlock_t lock; /* guards enqueueing of new packets */ 152 unsigned int token; /* WR token */ 153 dma_addr_t phys_addr; /* physical address of the ring */ 154 struct sk_buff_head sendq; /* List of backpressured offload packets */ 155 struct tasklet_struct qresume_tsk; /* restarts the queue */ 156 unsigned int cntxt_id; /* SGE context id for the Tx q */ 157 unsigned long stops; /* # of times q has been stopped */ 158 unsigned long restarts; /* # of queue restarts */ 159}; 160 161enum { /* per port SGE statistics */ 162 SGE_PSTAT_TSO, /* # of TSO requests */ 163 SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */ 164 SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */ 165 SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */ 166 SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */ 167 168 SGE_PSTAT_MAX /* must be last */ 169}; 170 171struct sge_qset { /* an SGE queue set */ 172 struct sge_rspq rspq; 173 struct sge_fl fl[SGE_RXQ_PER_SET]; 174 struct sge_txq txq[SGE_TXQ_PER_SET]; 175 struct net_device *netdev; /* associated net device */ 176 unsigned long txq_stopped; /* which Tx queues are stopped */ 177 struct timer_list tx_reclaim_timer; /* reclaims TX buffers */ 178 unsigned long port_stats[SGE_PSTAT_MAX]; 179} ____cacheline_aligned; 180 181struct sge { 182 struct sge_qset qs[SGE_QSETS]; 183 spinlock_t reg_lock; /* guards non-atomic SGE registers (eg context) */ 184}; 185 186struct adapter { 187 struct t3cdev tdev; 188 struct list_head adapter_list; 189 void __iomem *regs; 190 struct pci_dev *pdev; 191 unsigned long registered_device_map; 192 unsigned long open_device_map; 193 unsigned long flags; 194 195 const char *name; 196 int msg_enable; 197 unsigned int mmio_len; 198 199 struct adapter_params params; 200 unsigned int slow_intr_mask; 201 unsigned long irq_stats[IRQ_NUM_STATS]; 202 203 struct { 204 unsigned short vec; 205 char desc[22]; 206 } msix_info[SGE_QSETS + 1]; 207 208 /* T3 modules */ 209 struct sge sge; 210 struct mc7 pmrx; 211 struct mc7 pmtx; 212 struct mc7 cm; 213 struct mc5 mc5; 214 215 struct net_device *port[MAX_NPORTS]; 216 unsigned int check_task_cnt; 217 struct delayed_work adap_check_task; 218 struct work_struct ext_intr_handler_task; 219 220 /* 221 * Dummy netdevices are needed when using multiple receive queues with 222 * NAPI as each netdevice can service only one queue. 223 */ 224 struct net_device *dummy_netdev[SGE_QSETS - 1]; 225 226 struct dentry *debugfs_root; 227 228 struct mutex mdio_lock; 229 spinlock_t stats_lock; 230 spinlock_t work_lock; 231}; 232 233static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr) 234{ 235 u32 val = readl(adapter->regs + reg_addr); 236 237 CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val); 238 return val; 239} 240 241static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) 242{ 243 CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val); 244 writel(val, adapter->regs + reg_addr); 245} 246 247static inline struct port_info *adap2pinfo(struct adapter *adap, int idx) 248{ 249 return netdev_priv(adap->port[idx]); 250} 251 252/* 253 * We use the spare atalk_ptr to map a net device to its SGE queue set. 254 * This is a macro so it can be used as l-value. 255 */ 256#define dev2qset(netdev) ((netdev)->atalk_ptr) 257 258#define OFFLOAD_DEVMAP_BIT 15 259 260#define tdev2adap(d) container_of(d, struct adapter, tdev) 261 262static inline int offload_running(struct adapter *adapter) 263{ 264 return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map); 265} 266 267int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb); 268 269void t3_os_ext_intr_handler(struct adapter *adapter); 270void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status, 271 int speed, int duplex, int fc); 272 273void t3_sge_start(struct adapter *adap); 274void t3_sge_stop(struct adapter *adap); 275void t3_free_sge_resources(struct adapter *adap); 276void t3_sge_err_intr_handler(struct adapter *adapter); 277intr_handler_t t3_intr_handler(struct adapter *adap, int polling); 278int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev); 279int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb); 280void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p); 281int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports, 282 int irq_vec_idx, const struct qset_params *p, 283 int ntxq, struct net_device *netdev); 284int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx, 285 unsigned char *data); 286irqreturn_t t3_sge_intr_msix(int irq, void *cookie); 287 288#endif /* __T3_ADAPTER_H__ */ 289