Searched refs:readw (Results 1 - 25 of 206) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-ppc/
H A Dmpc8260_pci9.h11 #undef readw macro
22 extern int readw(volatile unsigned short *addr);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/tokenring/
H A Dlanstreamer.c454 writew(readw(streamer_mmio + BCTL) | BCTL_SOFTRESET, streamer_mmio + BCTL);
459 writew(readw(streamer_mmio + BCTL) & ~BCTL_SOFTRESET,
463 printk("BCTL: %x\n", readw(streamer_mmio + BCTL));
464 printk("GPR: %x\n", readw(streamer_mmio + GPR));
465 printk("SISRMASK: %x\n", readw(streamer_mmio + SISR_MASK));
467 writew(readw(streamer_mmio + BCTL) | (BCTL_RX_FIFO_8 | BCTL_TX_FIFO_8), streamer_mmio + BCTL );
470 writew(readw(streamer_mmio + GPR) | GPR_AUTOSENSE,
507 printk("GPR = %x\n", readw(streamer_mmio + GPR));
512 while (!((readw(streamer_mmio + SISR)) & SISR_SRB_REPLY)) {
524 misr = readw(streamer_mmi
[all...]
H A Dolympic.c324 printk("GPR: %x\n",readw(olympic_mmio+GPR));
334 writew(readw(olympic_mmio+GPR)|GPR_AUTOSENSE,olympic_mmio+GPR);
347 writew(readw(olympic_mmio+GPR)|GPR_NEPTUNE_BF,olympic_mmio+GPR);
350 printk("GPR = %x\n",readw(olympic_mmio + GPR) ) ;
382 writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA);
388 init_srb=olympic_priv->olympic_lap + ((readw(olympic_mmio+LAPWWO)) & (~0xf800));
399 if(readw(init_srb+6)) {
400 printk(KERN_INFO "tokenring card initialization failed. errorcode : %x\n",readw(init_srb+6));
412 uaa_addr=swab16(readw(init_srb+8));
429 olympic_priv->olympic_addr_table_addr = swab16(readw(init_sr
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H A D3c359.c221 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
229 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
237 return readw(xl_mmio + MMIO_MACDATA) ;
253 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
261 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
273 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
410 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
436 printk(KERN_INFO "Read from PMBAR = %04x \n", readw(xl_mmio + MMIO_MACDATA)) ;
439 if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) {
444 result_16 = readw(xl_mmi
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-v850/
H A Dio.h21 #define readw(addr) \ macro
27 #define readw_relaxed(a) readw(a)
38 #define __raw_readw readw
45 #define inw(addr) readw (addr)
110 #define ioread16(addr) readw (addr)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-m32r/
H A Dio.h57 * make bus memory CPU accessible via the readb/readw/readl/writeb/
149 #define readw(addr) _readw((unsigned long)(addr)) macro
152 #define __raw_readw readw
155 #define readw_relaxed readw
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-generic/
H A Dide_iops.h11 *(u16 *)addr = readw(port);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/dma/
H A Dioatdma_io.h40 return readw(device->reg_base + offset);
76 return readw(chan->reg_base + offset);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/rio/
H A Drioboot.c407 OldParmMap = readw(&HostP->__ParmMapR);
426 for (wait_count = 0; (wait_count < p->RIOConf.StartupTime) && (readw(&HostP->__ParmMapR) == OldParmMap); wait_count++) {
427 rio_dprintk(RIO_DEBUG_BOOT, "Checkout %d, 0x%x\n", wait_count, readw(&HostP->__ParmMapR));
436 if (readw(&HostP->__ParmMapR) == OldParmMap) {
437 rio_dprintk(RIO_DEBUG_BOOT, "parmmap 0x%x\n", readw(&HostP->__ParmMapR));
445 rio_dprintk(RIO_DEBUG_BOOT, "Running 0x%x\n", readw(&HostP->__ParmMapR));
456 ParmMapP = (PARM_MAP __iomem *) RIO_PTR(Cad, readw(&HostP->__ParmMapR));
458 ParmMapP = (PARM_MAP __iomem *)(Cad + readw(&HostP->__ParmMapR));
466 if (readw(&ParmMapP->links) != 0xFFFF) {
468 rio_dprintk(RIO_DEBUG_BOOT, "Links = 0x%x\n", readw(
[all...]
H A Drioinit.c262 if (readw(ram + off) != oldword) {
263 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword, readw(ram + off));
297 if (readw(ram + off) != invword) {
298 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, readw(ram + off));
304 if ( readw(ram + off) != newword ) {
305 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
324 if (readw(ram + off) != newword ) {
325 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
342 if (readw(ram + off) != swapword) {
343 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, readw(ra
[all...]
H A Drioparam.c587 *PktP = tp = (struct PKT __iomem *) RIO_PTR(PortP->Caddr, readw(PortP->TxAdd));
599 if (readw(PortP->TxAdd) & PKT_IN_USE) {
602 writew(readw(PortP->TxAdd) | PKT_IN_USE, PortP->TxAdd);
626 if ((old_end = readw(&HostP->ParmMapP->free_list_end)) != TPNULL) {
652 if (readw(PortP->RxRemove) & PKT_IN_USE) {
653 *PktP = (struct PKT __iomem *) RIO_PTR(PortP->Caddr, readw(PortP->RxRemove) & ~PKT_IN_USE);
666 writew(readw(PortP->RxRemove) & ~PKT_IN_USE, PortP->RxRemove);
H A Driocmd.c414 rio_dprintk(RIO_DEBUG_CMD, "PACKET information: Check 0x%x (%d)\n", readw(&PacketP->csum), readw(&PacketP->csum));
437 rio_dprintk(RIO_DEBUG_CMD, "Memory dump cmd (0x%x) from addr 0x%x\n", readb(&PktCmdP->SubCommand), readw(&PktCmdP->SubAddr));
440 rio_dprintk(RIO_DEBUG_CMD, "Read register (0x%x)\n", readw(&PktCmdP->SubAddr));
597 if ((UnixRupP->CmdsWaitingP == NULL) && (UnixRupP->CmdPendingP == NULL) && (readw(&UnixRupP->RupP->txcontrol) == TX_RUP_INACTIVE) && (CmdBlkP->PreFuncP ? (*CmdBlkP->PreFuncP) (CmdBlkP->PreArg, CmdBlkP)
604 HostP->Copy(&CmdBlkP->Packet, RIO_PTR(HostP->Caddr, readw(&UnixRupP->RupP->txpkt)), sizeof(struct PKT));
626 if (readw(&UnixRupP->RupP->txcontrol) != TX_RUP_INACTIVE)
676 if (readw(&UnixRupP->RupP->rxcontrol) != RX_RUP_INACTIVE) {
679 PacketP = (struct PKT __iomem *) RIO_PTR(HostP->Caddr, readw(&UnixRupP->RupP->rxpkt));
698 rio_dprintk(RIO_DEBUG_CMD, "Memdump from 0x%x complete\n", readw(
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/
H A Dmoxa.c1629 if ((temp = readw(ip + port)) != 0) {
1633 writew(readw(ofsAddr + HostStat) & ~WakeupTx, ofsAddr + HostStat);
1980 writew(readw(ofsAddr + HostStat) | WakeupBreak, ofsAddr + HostStat);
2154 val = readw(ofsAddr + FuncArg);
2156 val = readw(ofsAddr + FlagStat) >> 4;
2207 tx_mask = readw(ofsAddr + TX_mask);
2208 spage = readw(ofsAddr + Page_txb);
2209 epage = readw(ofsAddr + EndPage_txb);
2210 tail = readw(ofsAddr + TXwptr);
2211 head = readw(ofsAdd
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Ddl2k.c234 np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0;
666 int_status = readw (ioaddr + IntStatus);
760 writew (readw (ioaddr + TxStartThresh) + 0x10,
767 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
787 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
802 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);
982 stat_reg = readw (ioaddr + FramesAbortXSColls);
986 stat_reg = readw (ioaddr + CarrierSenseErrors);
992 readw (ioaddr + BcstFramesXmtdOk);
994 readw (ioadd
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H A Dhamachi.c754 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
756 readw(ioaddr + ANLinkPartnerAbility));
829 if ((readw(ioaddr + MII_Status) & 1) == 0)
834 if ((readw(ioaddr + MII_Status) & 1) == 0)
836 return readw(ioaddr + MII_Rd_Data);
847 if ((readw(ioaddr + MII_Status) & 1) == 0)
854 if ((readw(ioaddr + MII_Status) & 1) == 0)
899 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
997 dev->name, readw(ioaddr + RxStatus), readw(ioadd
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/serial/
H A Damba-pl011.c115 status = readw(uap->port.membase + UART01x_FR);
117 ch = readw(uap->port.membase + UART01x_DR) | UART_DUMMY_DR_RX;
154 status = readw(uap->port.membase + UART01x_FR);
197 status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
225 status = readw(uap->port.membase + UART011_MIS);
243 status = readw(uap->port.membase + UART011_MIS);
256 unsigned int status = readw(uap->port.membase + UART01x_FR);
264 unsigned int status = readw(uap->port.membase + UART01x_FR);
283 cr = readw(uap->port.membase + UART011_CR);
308 lcr_h = readw(ua
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-h8300/
H A Dio.h75 #define readw(addr) \ macro
91 #define readw_relaxed(addr) readw(addr)
95 #define __raw_readw readw
213 #define inb(addr) ((h8300_buswidth(addr))?readw((addr) & ~1) & 0xff:readb(addr))
214 #define inw(addr) _swapw(readw(addr))
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/
H A Dio.h72 static inline unsigned short readw(const volatile void __iomem *addr) function
87 #define readw_relaxed(addr) readw(addr)
90 #define __raw_readw readw
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/e1000/
H A De1000_osdep.h92 readw((a)->hw_addr + \
118 readw((a)->flash_address + reg))
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ebsa110/
H A Dio.h57 #define readw(b) __readw(b) macro
60 #define readw_relaxed(addr) readw(addr)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/i386/mach-visws/
H A Dmpparse.c80 unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-m68knommu/
H A Dio.h36 #define readw(addr) \ macro
42 #define readw_relaxed(addr) readw(addr)
50 #define __raw_readw readw
116 #define inw(addr) readw(addr)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/
H A Dio.h38 static inline unsigned short readw(const volatile void __iomem *addr) function
74 #define __raw_readw readw
84 #define inw(addr) readw(addr)
105 #define ioread16(X) readw(X)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ata/
H A Dsata_nv.c520 status = readw(mmio + NV_ADMA_STAT);
523 status = readw(mmio + NV_ADMA_STAT);
531 tmp = readw(mmio + NV_ADMA_CTL);
535 status = readw(mmio + NV_ADMA_STAT);
538 status = readw(mmio + NV_ADMA_STAT);
561 tmp = readw(mmio + NV_ADMA_CTL);
564 status = readw(mmio + NV_ADMA_STAT);
568 status = readw(mmio + NV_ADMA_STAT);
838 status = readw(mmio + NV_ADMA_STAT);
844 readw(mmi
[all...]
H A Dsata_inic162x.c173 ctl = readw(idma_ctl);
178 readw(idma_ctl); /* flush */
329 host_irq_stat = readw(mmio_base + HOST_IRQ_STAT);
431 val = readw(idma_ctl);
433 readw(idma_ctl); /* flush */
612 readw(mmio_base + HOST_CTL); /* flush */
616 val = readw(mmio_base + HOST_CTL);
634 val = readw(mmio_base + HOST_IRQ_MASK);
708 hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL);

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