Searched refs:outw (Results 1 - 25 of 240) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-shark/
H A Dsystem.h16 outw(0x09,0x24);
19 outw(0x09,0x24);
20 outw(temp,0x26);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/pci/
H A Dfixup-ddb5477.c70 outw(18, ioaddr + PCNET32_WIO_RAP);
73 outw(18, ioaddr + PCNET32_WIO_RAP);
74 outw(temp, ioaddr + PCNET32_WIO_BDP);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/boards/hp6xx/
H A Dpm.c39 outw(hd64461_stbcr, HD64461_STBCR);
50 outw(0xf07f, HD64461_SCPUCR);
54 outw(0, HD64461_SCPUCR);
61 outw(hd64461_stbcr, HD64461_STBCR);
H A Dsetup.c72 outw(v, HD64461_STBCR);
75 outw(v, HD64461_GPADR);
77 outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC0GCR);
80 outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC1GCR);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Dhp-plus.c188 outw(MAC_Page, ioaddr + HP_PAGING);
204 outw(ID_Page, ioaddr + HP_PAGING);
209 outw(HW_Page, ioaddr + HP_PAGING);
225 outw((HP_START_PG + TX_PAGES/2) | ((HP_STOP_PG - 1) << 8), ioaddr + 14);
264 outw(Perf_Page, ioaddr + HP_PAGING);
267 outw(inw(ioaddr + HPP_OPTION) & ~EnableIRQ, ioaddr + HPP_OPTION);
293 outw(option_reg & ~(NICReset + ChipReset), ioaddr + HPP_OPTION);
296 outw(option_reg | (EnableIRQ + NICReset + ChipReset), ioaddr + HPP_OPTION);
299 outw(HW_Page, ioaddr + HP_PAGING);
300 outw((HP_START_P
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H A Dseeq8005.c186 outw(0,SEEQ_REA);
212 outw( SEEQCMD_FIFO_WRITE | SEEQCMD_SET_ALL_OFF, SEEQ_CMD); /* setup for reading PROM */
213 outw( 0, SEEQ_DMAAR); /* set starting PROM address */
214 outw( SEEQCFG1_BUFFER_PROM, SEEQ_CFG1); /* set buffer to look at PROM */
223 outw( SEEQCFG2_RESET, SEEQ_CFG2); /* reset the card */
225 outw( SEEQCMD_SET_ALL_OFF, SEEQ_CMD);
265 outw( SEEQCMD_RX_INT_EN | SEEQCMD_SET_RX_ON | SEEQCMD_SET_RX_OFF, SEEQ_CMD );
376 outw( SEEQCMD_WINDOW_INT_ACK | (status & SEEQCMD_INT_MASK), SEEQ_CMD);
399 outw( SEEQCMD_WINDOW_INT_ACK | (status & SEEQCMD_INT_MASK), SEEQ_CMD);
406 outw( SEEQCMD_TX_INT_AC
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H A Deexpress.c298 outw(cmd, dev->base_addr + 0xc00a);
303 outw(val, dev->base_addr + 0xc00c);
308 outw(val, dev->base_addr + 0xc00e);
726 outw(CONF_DIAG_RESULT & ~31, ioaddr + SM_PTR);
735 outw(CONF_TDR_RESULT & ~31, ioaddr + SM_PTR);
852 outw(old_read_ptr, ioaddr+READ_PTR);
853 outw(old_write_ptr, ioaddr+WRITE_PTR);
903 outw(rx_block, ioaddr + READ_PTR);
912 outw(pbuf, ioaddr + READ_PTR);
959 outw(pbu
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H A D3c509.c69 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
502 outw(0x0f00, ioaddr + WN0_IRQ);
634 outw(SelectWindow | 0, ioaddr + 0xC80 + EL3_CMD);
695 outw(EEPROM_READ + index, ioaddr + 10);
731 outw(TxReset, ioaddr + EL3_CMD);
732 outw(RxReset, ioaddr + EL3_CMD);
733 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
767 outw(TxReset, ioaddr + EL3_CMD);
768 outw(TxEnable, ioaddr + EL3_CMD);
802 outw(sk
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H A Dlance.c497 outw(reset_val, ioaddr+LANCE_RESET);
499 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
504 outw(88, ioaddr+LANCE_ADDR);
509 outw(89, ioaddr+LANCE_ADDR);
566 outw(0x0001, ioaddr+LANCE_ADDR);
568 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
569 outw(0x0002, ioaddr+LANCE_ADDR);
571 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
572 outw(0x0000, ioaddr+LANCE_ADDR);
594 outw(
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H A Dibmlana.c246 outw(0, SONIC_URRA);
247 outw(priv->rrastart, dev->base_addr + SONIC_RSA);
248 outw(priv->rrastart + (priv->rxbufcnt * sizeof(rra_t)), dev->base_addr + SONIC_REA);
249 outw(priv->rrastart, dev->base_addr + SONIC_RRP);
250 outw(priv->rrastart, dev->base_addr + SONIC_RWP);
254 outw((PKTSIZE - 4) >> 1, dev->base_addr + SONIC_EOBC);
258 outw(CMDREG_RRRA, dev->base_addr + SONIC_CMDREG);
266 outw(0, dev->base_addr + SONIC_URDA);
267 outw(priv->rdastart, dev->base_addr + SONIC_CRDA);
271 outw(
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H A Dsmc9194.c48 . smc_enable, with outw instead of outb
352 outw( RCR_SOFTRESET, ioaddr + RCR );
359 outw( RCR_CLEAR, ioaddr + RCR );
360 outw( TCR_CLEAR, ioaddr + TCR );
366 outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL );
370 outw( MC_RESET, ioaddr + MMU_CMD );
391 outw( TCR_NORMAL, ioaddr + TCR );
392 outw( RCR_NORMAL, ioaddr + RCR );
552 outw( MC_ALLOC | numPages, ioaddr + MMU_CMD );
641 outw( PTR_AUTOIN
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/i386/mach-visws/
H A Dreboot.c39 outw(pm_status, PMSTS_PORT);
41 outw(PM_SUSPEND_ENABLE, PMCNTRL_PORT);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/radio/
H A Dradio-maestro.c121 outw(~(STR_CLK | STR_WREN), io + IO_MASK);
122 outw(0, io);
126 outw(STR_CLK, io); /* HI state */
130 outw(0, io); /* LO state */
144 outw(STR_WREN, io);
147 outw(omask, io + IO_MASK);
159 outw(odir | STR_DATA, io + IO_DIR);
160 outw(~(STR_DATA | STR_CLK | STR_WREN), io + IO_MASK);
165 outw(bits, io); /* start strobe */
167 outw(bit
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/evp/
H A De_xcbc_d.c76 DES_cblock outw; member in struct:__anon1398
107 memcpy(&data(ctx)->outw[0],&key[16],8);
118 &data(ctx)->outw,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/crypto/evp/
H A De_xcbc_d.c78 DES_cblock outw; member in struct:__anon2937
110 memcpy(&data(ctx)->outw[0],&key[16],8);
121 &data(ctx)->outw,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-m68knommu/
H A Dmcfsmc.h23 #undef outw macro
43 #define outw smc_outw macro
173 outw(0x0001, ioaddr + BANK_SELECT);
174 outw(0x0001, ioaddr + BANK_SELECT);
175 outw(0x0067, ioaddr + BASE);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/
H A Dds1302.c41 outw(0x0001,(unsigned long)PLD_RTCRSTODT);
43 outw(((x<<8)|(reg_addr&0xff)),(unsigned long)PLD_RTCWRDATA);
45 outw(0x0002,(unsigned long)PLD_RTCCR);
50 outw(0x0000,(unsigned long)PLD_RTCRSTODT);
60 outw(0x0001,(unsigned long)PLD_RTCRSTODT);
62 outw((reg_addr&0xff),(unsigned long)PLD_RTCRDDATA);
64 outw(0x0001,(unsigned long)PLD_RTCCR);
72 outw(0x0000,(unsigned long)PLD_RTCRSTODT);
301 outw(0x0000,(unsigned long)PLD_RTCCR);
302 outw(
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H A Disicom.c137 #define InterruptTheCard(base) outw(0, (base) + 0xc)
300 outw(0x8000 | (channel << card->shift_count) | 0x02, base);
301 outw(0x0504, base);
316 outw(0x8000 | (channel << card->shift_count) | 0x02, base);
317 outw(0x0404, base);
332 outw(0x8000 | (channel << card->shift_count) | 0x02, base);
333 outw(0x0a04, base);
348 outw(0x8000 | (channel << card->shift_count) | 0x02, base);
349 outw(0x0804, base);
364 outw(
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/pcmcia/
H A D3c589_cs.c67 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
314 outw(0x3f00, ioaddr + 8);
394 outw(cmd, dev->base_addr + EL3_CMD);
409 outw(EEPROM_READ + index, ioaddr + 10);
428 case 0: case 1: outw(0, ioaddr + 6); break;
429 case 2: outw(3<<14, ioaddr + 6); break;
430 case 3: outw(1<<14, ioaddr + 6); break;
433 outw((if_port == 2) ? StartCoax : StopCoax, ioaddr + EL3_CMD);
436 outw(MEDIA_LED | ((if_port < 2) ? MEDIA_TP : 0), ioaddr + WN4_MEDIA);
466 outw(
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H A D3c574_cs.c142 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
398 outw(2<<11, ioaddr + RunnerRdCtrl);
400 outw(0<<11, ioaddr + RunnerRdCtrl);
414 outw(0x8040, ioaddr + Wn3_Options);
416 outw(0xc040, ioaddr + Wn3_Options);
420 outw(0x8040, ioaddr + Wn3_Options);
533 outw(cmd, dev->base_addr + EL3_CMD);
546 outw(EEPROM_Read + index, ioaddr + Wn0EepromCmd);
577 outw(MDIO_DATA_WRITE1, mdio_addr);
578 outw(MDIO_DATA_WRITE
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ide/pci/
H A Dtc86c001.c43 outw(scr, scr_port);
76 outw(0, sc_base + 0x0a); /* Sector Count */
77 outw(0, twcr_port); /* Transfer Word Count 1 or 2 */
112 outw(nsectors, sc_base + 0x0a); /* Sector Count */
113 outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
152 outw(scr1, sc_base + 0x00);
173 outw(scr1 | 0x8000, sc_base + 0x00);
176 outw(scr1 | 0x4000, sc_base + 0x00);
179 outw(scr1 & ~0xc000, sc_base + 0x00);
197 outw(
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/boot/lib/
H A Dvreset.c393 outw(int port, unsigned short val) function
427 outw(0x3C4, 0x0612); /* unlock ext regs */
428 outw(0x3C4, 0x0700); /* reset ext sequence mode */
432 outw(0x3ce, 0x0f05); /* unlock pardise registers */
433 outw(0x3c4, 0x0648);
434 outw(0x3d4, 0x2985);
435 outw(0x3d4, 0x34a6);
438 outw(0x3c4, 0x1400);
447 outw(0x3d4, 0x0250);
448 outw(
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/cchips/hd6446x/hd64465/
H A Dgpio.c49 outw(cr, GPIO_CR(_PORTOF(portpin)));
62 outw(d, GPIO_DR(_PORTOF(portpin)));
74 outw(value, GPIO_DR(port));
108 outw(isr, GPIO_ISR(port));
143 outw(icr, GPIO_ICR(_PORTOF(portpin)));
160 outw(icr, GPIO_ICR(_PORTOF(portpin)));
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/cchips/hd6446x/hd64461/
H A Dsetup.c25 outw(nimr, HD64461_NIMR);
35 outw(nimr, HD64461_NIMR);
143 outw(0x2240, INTC_ICR1);
145 outw(0xffff, HD64461_NIMR);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/watchdog/
H A Dscx200_wdt.c62 outw(wdto_restart, scx200_cb_base + SCx200_WDT_WDTO);
76 outw(0, scx200_cb_base + SCx200_WDT_WDTO);
78 outw(W_ENABLE, scx200_cb_base + SCx200_WDT_WDCNFG);
87 outw(0, scx200_cb_base + SCx200_WDT_WDTO);
89 outw(W_DISABLE, scx200_cb_base + SCx200_WDT_WDCNFG);

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