/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/i386/pci/ |
H A D | legacy.c | 14 int n, devfn; local 24 for (devfn = 0; devfn < 256; devfn += 8) { 25 if (!raw_pci_ops->read(0, n, devfn, PCI_VENDOR_ID, 2, &l) && 27 DBG("Found device at %02x:%02x [%04x]\n", n, devfn, l);
|
H A D | mmconfig.c | 28 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) argument 34 test_bit(PCI_SLOT(devfn) + 32*bus, pci_mmcfg_fallback_slots)) 52 static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) argument 54 u32 dev_base = base | (bus << 20) | (devfn << 12); 65 unsigned int devfn, int reg, int len, u32 *value) 70 if ((bus > 255) || (devfn > 255) || (reg > 4095)) { 75 base = get_base_addr(seg, bus, devfn); 77 return pci_conf1_read(seg,bus,devfn,reg,len,value); 81 pci_exp_set_dev_base(base, bus, devfn); 101 unsigned int devfn, in 64 pci_mmcfg_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument 100 pci_mmcfg_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument 139 pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus, unsigned int devfn) argument [all...] |
H A D | direct.c | 14 #define PCI_CONF1_ADDRESS(bus, devfn, reg) \ 15 (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3)) 18 unsigned int devfn, int reg, int len, u32 *value) 22 if ((bus > 255) || (devfn > 255) || (reg > 255)) { 29 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); 49 unsigned int devfn, int reg, int len, u32 value) 53 if ((bus > 255) || (devfn > 255) || (reg > 255)) 58 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); 92 unsigned int devfn, int reg, int len, u32 *value) 97 if ((bus > 255) || (devfn > 25 17 pci_conf1_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument 48 pci_conf1_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument 91 pci_conf2_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument 132 pci_conf2_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument 192 int devfn; local [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/pci/ |
H A D | ops-sni.c | 24 static int set_config_address(unsigned int busno, unsigned int devfn, int reg) argument 26 if ((devfn > 255) || (reg > 255)) 29 if (busno == 0 && devfn >= PCI_DEVFN(8, 0)) 34 ((devfn & 0xff) << 8) | 40 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg, argument 45 if ((res = set_config_address(bus->number, devfn, reg))) 63 static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, argument 68 if ((res = set_config_address(bus->number, devfn, reg))) 91 static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int reg) argument 93 if ((devfn > 25 100 pcit_read(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 * val) argument 137 pcit_write(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) argument [all...] |
H A D | ops-emma2rh.c | 43 static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num) argument 54 if (PCI_SLOT(devfn) >= 10) 58 if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16)) 65 unsigned int devfn, int where) 74 config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9); 79 config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) | 87 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, argument 97 if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND) 102 if (set_pci_configuration_address(bus_num, devfn, where) < 0) 106 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 64 set_pci_configuration_address(unsigned char bus_num, unsigned int devfn, int where) argument 132 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-gt64xxx_pci0.c | 43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 48 if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0))) 58 (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | 63 if (busnum == 0 && PCI_SLOT(devfn) == 0) { 72 if (busnum == 0 && PCI_SLOT(devfn) == 0) { 103 static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument 108 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, 122 static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument 131 devfn, where, &data)) 142 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, 42 gt64xxx_pci0_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument [all...] |
H A D | ops-titan-ht.c | 35 static int titan_ht_config_read_dword(struct pci_bus *bus, unsigned int devfn, argument 43 address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000; 67 static int titan_ht_config_read(struct pci_bus *bus, unsigned int devfn, argument 72 titan_ht_config_read_dword(bus, devfn, offset, &dword); 81 unsigned int devfn, int offset, u32 val) 88 address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000; 106 static int titan_ht_config_write(struct pci_bus *bus, unsigned int devfn, argument 111 titan_ht_config_read_dword(bus, devfn, offset, &val2); 117 titan_ht_config_write_dword(bus, devfn, offset, val1 | val2); 80 titan_ht_config_write_dword(struct pci_bus *bus, unsigned int devfn, int offset, u32 val) argument
|
H A D | ops-vr41xx.c | 36 unsigned int devfn, int where) 42 if (PCI_SLOT(devfn) < 11 || where > 0xff) 45 writel((1U << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) | 54 writel(((uint32_t)number << 16) | ((devfn & 0xff) << 8) | 61 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, argument 67 if (set_pci_configuration_address(bus->number, devfn, where) < 0) 89 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, argument 95 if (set_pci_configuration_address(bus->number, devfn, where) < 0) 35 set_pci_configuration_address(unsigned char number, unsigned int devfn, int where) argument
|
H A D | ops-nile4.c | 21 struct pci_bus *bus, unsigned int devfn, int where, u32 * val) 26 if ((busnum == 0) && (PCI_SLOT(devfn) > 8)) 32 if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) { 55 ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8) 58 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) | 78 static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument 91 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 108 static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument 121 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, wher 20 nile4_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * val) argument [all...] |
H A D | ops-msc.c | 48 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 59 (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) | 60 (PCI_FUNC(devfn) << MSC01_PCI_CFGADDR_FNUM_SHF) | 89 static int msc_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument 99 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 113 static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument 126 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, 138 if (msc_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, 47 msc_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument
|
H A D | ops-mace.c | 39 mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, argument 42 chkslot(bus, devfn); 43 mace->pci.config_addr = mkaddr(devfn, reg); 62 mace_pci_write_config(struct pci_bus *bus, unsigned int devfn, argument 65 chkslot(bus, devfn); 66 mace->pci.config_addr = mkaddr(devfn, reg);
|
H A D | ops-marvell.c | 14 static int mv_read_config(struct pci_bus *bus, unsigned int devfn, argument 26 if (PCI_SLOT(devfn) == 31) 29 address = (bus->number << 16) | (devfn << 8) | 52 static int mv_write_config(struct pci_bus *bus, unsigned int devfn, argument 64 if (PCI_SLOT(devfn) == 31) 67 address = (bus->number << 16) | (devfn << 8) |
|
H A D | ops-pnx8550.c | 44 calc_cfg_addr(struct pci_bus *bus, unsigned int devfn, int where) argument 49 addr |= ((devfn & 0xff) << PCI_CFG_FUNC_SHIFT) | (where & 0xfc); 55 config_access(unsigned int pci_cmd, struct pci_bus *bus, unsigned int devfn, int where, unsigned int pci_mode, unsigned int *val) argument 59 unsigned long ioaddr = calc_cfg_addr(bus, devfn, where); 115 read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 * val) argument 123 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data); 143 read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 * val) argument 154 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(3 << (where & 3)), &data); 168 read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 * val) argument 177 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, wher 183 write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val) argument 211 write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val) argument 235 write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) argument 249 config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) argument 269 config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-titan.c | 42 static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg, argument 49 dev = PCI_SLOT(devfn); 50 func = PCI_FUNC(devfn); 71 static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg, argument 78 dev = PCI_SLOT(devfn); 79 func = PCI_FUNC(devfn);
|
H A D | ops-bonito64.c | 47 unsigned int devfn, int where, 56 if ((busnum == 0) && (PCI_SLOT(devfn) > 21)) { 71 pci_addr = (u64) 1 << (PCI_SLOT(devfn) + 10); 78 PCI_SLOT(devfn) << PCI_CFG_TYPE1_DEV_SHF; 82 pci_addr |= PCI_FUNC(devfn) << PCI_CFG_TYPE0_FUNC_SHF; 131 static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument 141 if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 155 static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument 168 if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, 180 if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, wher 45 bonito64_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument [all...] |
H A D | ops-au1000.c | 195 static int read_config_byte(struct pci_bus *bus, unsigned int devfn, argument 201 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); 211 static int read_config_word(struct pci_bus *bus, unsigned int devfn, argument 217 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); 224 static int read_config_dword(struct pci_bus *bus, unsigned int devfn, argument 229 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); 234 write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, argument 239 if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) 245 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) 252 write_config_word(struct pci_bus *bus, unsigned int devfn, in argument 271 write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) argument 280 config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) argument 301 config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | fixup-rbtx4927.c | 90 PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) { 91 printk("Onboard PCI_SLOT(dev->devfn) is %d\n", 92 PCI_SLOT(dev->devfn)); 94 irq = (irq + PCI_SLOT(dev->devfn)) % 4; 114 DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n", 115 PCI_SLOT(dev->devfn)); 116 irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
|
H A D | ops-ddb5477.c | 130 struct pci_bus *bus, u32 devfn, u32 where, 147 slot_num = PCI_SLOT(devfn); 148 func_num = PCI_FUNC(devfn); 156 struct pci_bus *bus, u32 devfn, u32 where, 164 status = read_config_dword(swap, bus, devfn, where & ~3, &result); 172 struct pci_bus *bus, u32 devfn, u32 where, 178 status = read_config_dword(swap, bus, devfn, where & ~3, &result); 189 struct pci_bus *bus, u32 devfn, u32 where, 206 slot_num = PCI_SLOT(devfn); 207 func_num = PCI_FUNC(devfn); 129 read_config_dword(struct pci_config_swap *swap, struct pci_bus *bus, u32 devfn, u32 where, u32 * val) argument 155 read_config_word(struct pci_config_swap *swap, struct pci_bus *bus, u32 devfn, u32 where, u16 * val) argument 171 read_config_byte(struct pci_config_swap *swap, struct pci_bus *bus, u32 devfn, u32 where, u8 * val) argument 188 write_config_dword(struct pci_config_swap *swap, struct pci_bus *bus, u32 devfn, u32 where, u32 val) argument 214 write_config_word(struct pci_config_swap *swap, struct pci_bus *bus, u32 devfn, u32 where, u16 val) argument 233 write_config_byte(struct pci_config_swap *swap, struct pci_bus *bus, u32 devfn, u32 where, u8 val) argument [all...] |
H A D | pci-bcm1480.c | 37 #define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where)) 38 #define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 78 static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) argument 86 devno = PCI_SLOT(devfn); 101 static int bcm1480_pcibios_read(struct pci_bus *bus, unsigned int devfn, argument 111 if (bcm1480_pci_can_access(bus, devfn)) 112 data = READCFG32(CFGADDR(bus, devfn, where)); 126 static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn, argument [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/boot/simple/ |
H A D | pci.c | 33 void probe_addresses(int bus, int devfn); 62 unsigned int devfn, l, class, bus_number; local 67 for (devfn = 0; devfn < 0xff; ++devfn) { 71 if ((devfn & 7) && !is_multi) { 80 qs_pci_read_config_byte(bus_number, devfn, PCI_HEADER_TYPE, 86 if ((devfn & 7) == 0) 91 qs_pci_read_config_dword(bus_number, devfn, PCI_VENDOR_ID, &l); 105 qs_pci_read_config_dword(bus_number, devfn, [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/pci/hotplug/ |
H A D | cpci_hotplug_pci.c | 57 slot->devfn, 63 slot->devfn, 77 slot->devfn, 82 slot->devfn, 91 slot->devfn, 104 slot->devfn, 109 slot->devfn, 123 slot->devfn, 128 slot->devfn, 135 slot->devfn, [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/alpha/kernel/ |
H A D | sys_miata.c | 179 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) { 181 struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7); 201 slot = PCI_SLOT(dev->devfn); 204 else if ((PCI_SLOT(dev->bus->self->devfn) == 8) || 205 (PCI_SLOT(dev->bus->self->devfn) == 20)) { 206 slot = PCI_SLOT(dev->devfn) + 9; 212 if ((PCI_SLOT(dev->bus->self->devfn) == 8) || 213 (PCI_SLOT(dev->bus->self->devfn) == 20)) { 214 slot = PCI_SLOT(dev->devfn) + 9; 217 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/x86_64/pci/ |
H A D | mmconfig.c | 40 static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) argument 44 test_bit(32*bus + PCI_SLOT(devfn), pci_mmcfg_fallback_slots)) 49 return addr + ((bus << 20) | (devfn << 12)); 53 unsigned int devfn, int reg, int len, u32 *value) 58 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { 63 addr = pci_dev_base(seg, bus, devfn); 65 return pci_conf1_read(seg,bus,devfn,reg,len,value); 83 unsigned int devfn, int reg, int len, u32 value) 88 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) 91 addr = pci_dev_base(seg, bus, devfn); 52 pci_mmcfg_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument 82 pci_mmcfg_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument 129 pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus, unsigned int devfn) argument [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/platforms/pasemi/ |
H A D | pci.c | 34 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off)) 36 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset) argument 42 if (bus == 0 && devfn == 0) 49 u8 bus, u8 devfn, int offset) 51 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset); 54 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn, argument 64 if (!pa_pxp_offset_valid(bus->number, devfn, offset)) 67 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); 88 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn, argument 48 pa_pxp_cfg_addr(struct pci_controller *hose, u8 bus, u8 devfn, int offset) argument [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ixp23xx/ |
H A D | pci.c | 50 *ixp23xx_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where) argument 63 if (PCI_SLOT(devfn) >= 8) 67 | (1 << (PCI_SLOT(devfn) + 16)) 68 | (PCI_FUNC(devfn) << 8) | where); 72 | (PCI_SLOT(devfn) << 11) 73 | (PCI_FUNC(devfn) << 8) | where); 91 static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, argument 100 bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); 102 addr = ixp23xx_pci_config_addr(bus->number, devfn, wher 122 ixp23xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument [all...] |