Searched refs:clocks (Results 1 - 25 of 50) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-parisc/
H A Ddelay.h22 static __inline__ void __cr16_delay(unsigned long clocks) { argument
33 while ((mfctl(16) - start) < clocks)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/au1000/common/
H A DMakefile10 au1xxx_irqmap.o clocks.o platform.o power.o setup.o \
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-aaec2000/
H A Dclock.c25 static LIST_HEAD(clocks);
33 list_for_each_entry(p, &clocks, node) {
83 list_add(&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-lh7a40x/
H A DMakefile7 obj-y := time.o clocks.o
H A Dclocks.c1 /* arch/arm/mach-lh7a40x/clocks.c
13 #include <asm/arch/clocks.h>
82 static LIST_HEAD(clocks);
91 list_for_each_entry (p, &clocks, node) {
160 list_add (&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/platforms/4xx/
H A Docotea.c54 static struct ibm44x_clocks clocks __initdata;
64 freq = clocks.cpu;
241 port.uartclk = clocks.uart0;
261 port.uartclk = clocks.uart1;
282 * Determine various clocks.
287 ibm440gx_get_clocks(&clocks, 33300000, 6 * 1843200);
288 ocp_sys_info.opb_bus_freq = clocks.opb;
322 ibm440gx_l2c_setup(&clocks);
H A Dbamboo.c53 static struct ibm44x_clocks clocks __initdata;
79 freq = clocks.cpu;
320 port.uartclk = clocks.uart0;
337 port.uartclk = clocks.uart1;
351 port.uartclk = clocks.uart2;
365 port.uartclk = clocks.uart3;
379 ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
380 ocp_sys_info.opb_bus_freq = clocks.opb;
H A Dluan.c54 static struct ibm44x_clocks clocks __initdata;
64 freq = clocks.cpu;
277 port.uartclk = clocks.uart0;
289 port.uartclk = clocks.uart1;
320 * Determine various clocks.
326 ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
327 ocp_sys_info.opb_bus_freq = clocks.opb;
H A Dtaishan.c49 static struct ibm44x_clocks clocks __initdata;
135 freq = clocks.cpu;
299 port.uartclk = clocks.uart0;
318 port.uartclk = clocks.uart1;
338 * Determine various clocks.
343 ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
344 ocp_sys_info.opb_bus_freq = clocks.opb;
371 ibm440gx_l2c_setup(&clocks);
H A Debony.c56 static struct ibm44x_clocks clocks __initdata;
218 port.uartclk = clocks.uart0;
238 port.uartclk = clocks.uart1;
271 * Determine various clocks.
276 ibm440gp_get_clocks(&clocks, 33333333, 6 * 1843200);
277 ocp_sys_info.opb_bus_freq = clocks.opb;
H A Dyucca.c56 static struct ibm44x_clocks clocks __initdata;
66 freq = clocks.cpu;
303 port.uartclk = clocks.uart0;
315 port.uartclk = clocks.uart1;
346 * Determine various clocks.
352 ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
353 ocp_sys_info.opb_bus_freq = clocks.opb;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-integrator/
H A Dclock.c25 static LIST_HEAD(clocks);
33 list_for_each_entry(p, &clocks, node) {
97 * These are fixed clocks.
112 list_add(&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pxa/
H A Dclock.c27 static LIST_HEAD(clocks);
36 list_for_each_entry(p, &clocks, node) {
105 list_add(&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-realview/
H A Dclock.c24 static LIST_HEAD(clocks);
32 list_for_each_entry(p, &clocks, node) {
94 * These are fixed clocks.
114 list_add(&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-sa1100/
H A Dclock.c29 static LIST_HEAD(clocks);
38 list_for_each_entry(p, &clocks, node) {
115 list_add(&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-versatile/
H A Dclock.c25 static LIST_HEAD(clocks);
33 list_for_each_entry(p, &clocks, node) {
95 * These are fixed clocks.
115 list_add(&clk->node, &clocks);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ep93xx/
H A Dclock.c56 static struct clk *clocks[] = { variable in typeref:struct:clk
70 for (i = 0; i < ARRAY_SIZE(clocks); i++) {
71 if (!strcmp(clocks[i]->name, id))
72 return clocks[i];
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-omap/
H A Dclock.c30 static LIST_HEAD(clocks);
43 list_for_each_entry(p, &clocks, node) {
60 list_for_each_entry(p, &clocks, node) {
91 list_for_each_entry(p, &clocks, node) {
99 list_for_each_entry(p, &clocks, node) {
280 /* Used for clocks that always have same value as the parent clock */
299 list_for_each_entry(clkp, &clocks, node) {
313 list_add(&clk->node, &clocks);
365 * Disable any unused clocks left on by the bootloader
372 list_for_each_entry(ck, &clocks, nod
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ide/pci/
H A Dcy82c693.c109 u8 address_time; /* Address setup (clocks) */
110 u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */
111 u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */
112 u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */
116 * calc clocks using bus_speed
117 * returns (rounded up) time in bus clocks for time in ns
121 int clocks; local
123 clocks = (time*bus_speed+999)/1000 -1;
125 if (clocks < 0)
126 clocks
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2410/
H A Dclock.c50 unsigned int clocks = clk->ctrlbit; local
56 clkcon |= clocks;
58 clkcon &= ~clocks;
203 * Add all the clocks used by the s3c2410 or compatible CPUs
225 /* register clocks from clock array */
240 /* We must be careful disabling the clocks we are not intending to
250 /* install (and disable) the clocks we do not need immediately */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2440/
H A Dmach-rx3715.c87 .clocks = rx3715_serial_clocks,
96 .clocks = rx3715_serial_clocks,
106 .clocks = rx3715_serial_clocks,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-at91/
H A Dclock.c38 * There's a lot more which can be done with clocks, including cpufreq
49 static LIST_HEAD(clocks);
57 * 48 MHz (unless no USB function clocks are needed). The main clock and
115 /* USB function clocks (PLLB must be 48 MHz) */
131 * (e.g baud rate generation). It's sourced from one of the primary clocks.
178 /* clocks cannot be de-registered no refcounting necessary */
183 list_for_each_entry(clk, &clocks, node) {
259 * For now, only the programmable clocks support reparenting (MCK could
378 list_for_each_entry(clk, &clocks, node) {
430 list_add_tail(&clk->node, &clocks);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v32/boot/rescue/
H A Dhead.S12 ;; Start clocks for used blocks.
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ata/
H A Dpata_hpt366.c201 struct hpt_clock *clocks = ap->host->private_data; local
203 while(clocks->xfer_speed) {
204 if (clocks->xfer_speed == speed)
205 return clocks->timing;
206 clocks++;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/
H A Dclock.c57 unsigned int clocks = clk->ctrlbit; local
63 clkcon |= clocks;
65 clkcon &= ~clocks;
74 unsigned int clocks = clk->ctrlbit; local
80 clkcon |= clocks;
82 clkcon &= ~clocks;
91 unsigned int clocks = clk->ctrlbit; local
97 clkcon |= clocks;
99 clkcon &= ~clocks;
813 /* clocks t
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