Searched refs:byteout (Results 1 - 23 of 23) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/isdn/hisax/
H A Davm_a1p.c56 #define byteout(addr,val) outb(val,addr) macro
67 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
76 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
77 byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
83 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
90 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
100 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
110 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
112 byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
118 byteout(c
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H A Dnj_u.c87 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
91 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
95 byteout(cs->hw.njet.auxa, 0);
96 byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
97 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
98 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
179 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
183 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
189 byteout(cs->hw.njet.auxa, 0);
190 byteout(c
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H A Dteleint.c23 #define byteout(addr,val) outb(val,addr) macro
32 byteout(ale, off);
51 byteout(ale, off);
71 byteout(ale, off);
79 byteout(adr, data);
89 byteout(ale, off);
98 byteout(adr, data[i]);
139 byteout(cs->hw.hfc.addr | 1, reg);
151 byteout(cs->hw.hfc.addr | 1, reg);
154 byteout(c
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H A Dnj_s.c61 byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
104 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
112 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
116 byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
117 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
118 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
214 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
218 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
224 byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
225 byteout(c
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H A Dsaphir.c24 #define byteout(addr,val) outb(val,addr) macro
39 byteout(ale, off);
47 byteout(ale, off);
55 byteout(ale, off);
56 byteout(adr, data);
62 byteout(ale, off);
177 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, 0xff);
208 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val);
209 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 1);
211 byteout(c
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H A Dsportster.c24 #define byteout(addr,val) outb(val,addr) macro
63 byteout(calc_off(cs->hw.spt.isac, offset), value);
87 byteout(calc_off(cs->hw.spt.hscx[hscx], offset), value);
95 #define WRITEHSCX(cs, nr, reg, data) byteout(calc_off(cs->hw.spt.hscx[nr], reg), data)
140 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, 0);
151 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq);
154 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq);
177 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq);
H A Davm_a1.c26 #define byteout(addr,val) outb(val,addr) macro
38 byteout(adr + off, data);
113 byteout(cs->hw.avm.cfg_reg, 0x1E);
170 byteout(cs->hw.avm.cfg_reg, 0x16);
171 byteout(cs->hw.avm.cfg_reg, 0x1E);
260 byteout(cs->hw.avm.cfg_reg, 0x0);
262 byteout(cs->hw.avm.cfg_reg, 0x1);
264 byteout(cs->hw.avm.cfg_reg, 0x0);
269 byteout(cs->hw.avm.cfg_reg + 1, val);
271 byteout(c
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H A Dmic.c23 #define byteout(addr,val) outb(val,addr) macro
38 byteout(ale, off);
46 byteout(ale, off);
54 byteout(ale, off);
55 byteout(adr, data);
61 byteout(ale, off);
H A Dix1_micro.c30 #define byteout(addr,val) outb(val,addr) macro
47 byteout(ale, off);
55 byteout(ale, off);
63 byteout(ale, off);
64 byteout(adr, data);
70 byteout(ale, off);
180 byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 1);
183 byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 0);
H A Delsa.c45 #define byteout(addr,val) outb(val,addr) macro
147 byteout(ale, off);
155 byteout(ale, off);
163 byteout(ale, off);
164 byteout(adr, data);
170 byteout(ale, off);
243 byteout(cs->hw.elsa.ale, off);
251 byteout(cs->hw.elsa.ale, off);
252 byteout(cs->hw.elsa.itac, data);
340 byteout(c
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H A Dsedlbauer.c85 #define byteout(addr,val) outb(val,addr) macro
126 byteout(ale, off);
134 byteout(ale, off);
142 byteout(ale, off);
143 byteout(adr, data);
149 byteout(ale, off);
229 byteout(cs->hw.sedl.adr, offset);
240 byteout(cs->hw.sedl.adr, offset);
241 byteout(cs->hw.sedl.hscx, value);
429 byteout(c
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H A Dnetjet.h17 #define byteout(addr,val) outb(val,addr) macro
H A Dniccy.c27 #define byteout(addr,val) outb(val,addr) macro
51 byteout(ale, off);
59 byteout(ale, off);
66 byteout(ale, off);
67 byteout(adr, data);
73 byteout(ale, off);
H A Dasuscom.c27 #define byteout(addr,val) outb(val,addr) macro
50 byteout(ale, off);
58 byteout(ale, off);
66 byteout(ale, off);
67 byteout(adr, data);
73 byteout(ale, off);
257 byteout(cs->hw.asus.adr, ASUS_RESET); /* Reset On */
262 byteout(cs->hw.asus.adr, 0); /* Reset Off */
H A Dteles3.c26 #define byteout(addr,val) outb(val,addr) macro
38 byteout(adr + off, data);
210 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg);
212 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg | 1);
215 byteout(cs->hw.teles3.cfg_reg, 0xff);
217 byteout(cs->hw.teles3.cfg_reg, 0x00);
221 byteout(cs->hw.teles3.isac + 0x3c, 0);
223 byteout(cs->hw.teles3.isac + 0x3c, 1);
H A Dnetjet.c36 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
46 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
47 byteout(cs->hw.njet.isac + ((offset & 0xf)<<2), value);
54 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
62 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
107 byteout(cs->hw.njet.base + NETJET_DMACTRL,
109 byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
118 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
137 byteout(cs->hw.njet.base + NETJET_DMACTRL,
139 byteout(c
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H A Disurf.c24 #define byteout(addr,val) outb(val,addr) macro
138 byteout(cs->hw.isurf.reset, chips); /* Reset On */
140 byteout(cs->hw.isurf.reset, ISURF_ISAR_EA); /* Reset Off */
H A Dgazel.c42 #define byteout(addr,val) outb(val,addr) macro
54 byteout(adr + off, data);
75 byteout(adr, off);
83 byteout(adr, off);
84 byteout(adr + 4, data);
91 byteout(adr, off);
98 byteout(adr, off);
H A Ddiva.c32 #define byteout(addr,val) outb(val,addr) macro
88 byteout(ale, off);
96 byteout(ale, off);
104 byteout(ale, off);
105 byteout(adr, data);
111 byteout(ale, off);
727 byteout(cs->hw.diva.ctrl, 0); /* LED off, Reset */
782 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
785 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
790 byteout(c
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H A Dteles0.c29 #define byteout(addr,val) outb(val,addr) macro
231 byteout(cs->hw.teles0.cfg_reg + 4, cfval);
233 byteout(cs->hw.teles0.cfg_reg + 4, cfval | 1);
H A Dhfc_sx.c56 #define byteout(addr,val) outb(val,addr) macro
65 byteout(cs->hw.hfcsx.base+1, regnum);
66 byteout(cs->hw.hfcsx.base, val);
74 byteout(cs->hw.hfcsx.base+1, regnum);
89 byteout(cs->hw.hfcsx.base+1, HFCSX_FIF_SEL);
90 byteout(cs->hw.hfcsx.base, fifo);
93 byteout(cs->hw.hfcsx.base, fifo);
105 byteout(cs->hw.hfcsx.base+1, HFCSX_CIRM);
106 byteout(cs->hw.hfcsx.base, cs->hw.hfcsx.cirm | 0x80); /* reset cmd */
1461 byteout(c
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H A Dhfc_2bds0.c23 #define byteout(addr,val) outb(val,addr) macro
40 byteout(cs->hw.hfcD.addr | 1, reg);
57 byteout(cs->hw.hfcD.addr | 1, reg);
60 byteout(cs->hw.hfcD.addr, value);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/isdn/hysdn/
H A Dboardergo.c28 #define byteout(addr,val) outb(val,addr) macro
141 byteout(card->iobase + PCI9050_INTR_REG, val);
143 byteout(card->iobase + PCI9050_USER_IO, PCI9050_E1_RESET); /* reset E1 processor */
242 byteout(card->iobase + PCI9050_USER_IO, PCI9050_E1_RUN); /* start E1 processor */
359 byteout(card->iobase + PCI9050_INTR_REG,

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