Searched refs:boxes (Results 1 - 22 of 22) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/drm/
H A Dsavage_state.c785 const drm_clip_rect_t *boxes)
814 x = boxes[i].x1, y = boxes[i].y1;
815 w = boxes[i].x2 - boxes[i].x1;
816 h = boxes[i].y2 - boxes[i].y1;
854 unsigned int nbox, const drm_clip_rect_t *boxes)
872 DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[
781 savage_dispatch_clear(drm_savage_private_t * dev_priv, const drm_savage_cmd_header_t * cmd_header, const drm_savage_cmd_header_t *data, unsigned int nbox, const drm_clip_rect_t *boxes) argument
853 savage_dispatch_swap(drm_savage_private_t * dev_priv, unsigned int nbox, const drm_clip_rect_t *boxes) argument
882 savage_dispatch_draw(drm_savage_private_t * dev_priv, const drm_savage_cmd_header_t *start, const drm_savage_cmd_header_t *end, const drm_buf_t * dmabuf, const unsigned int *vtxbuf, unsigned int vb_size, unsigned int vb_stride, unsigned int nbox, const drm_clip_rect_t *boxes) argument
[all...]
H A Dradeon_irq.c122 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
144 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
H A Dr128_state.c41 drm_clip_rect_t * boxes, int count)
51 OUT_RING(boxes[0].x1);
52 OUT_RING(boxes[0].x2 - 1);
53 OUT_RING(boxes[0].y1);
54 OUT_RING(boxes[0].y2 - 1);
60 OUT_RING(boxes[1].x1);
61 OUT_RING(boxes[1].x2 - 1);
62 OUT_RING(boxes[1].y1);
63 OUT_RING(boxes[1].y2 - 1);
69 OUT_RING(boxes[
40 r128_emit_clip_rects(drm_r128_private_t * dev_priv, drm_clip_rect_t * boxes, int count) argument
[all...]
H A Dradeon_state.c746 x += dev_priv->sarea_priv->boxes[0].x1;
747 y += dev_priv->sarea_priv->boxes[0].y1;
796 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
800 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
805 if (dev_priv->stats.boxes & RADEON_BOX_FLIP)
810 if (dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE)
818 if (dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD)
823 if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE))
854 drm_clip_rect_t *pbox = sarea_priv->boxes;
1206 radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[
2751 drm_clip_rect_t __user *boxes = cmdbuf->boxes; local
[all...]
H A Dradeon_ioc32.c249 u32 boxes; member in struct:drm_radeon_cmd_buffer32
267 || __put_user((void __user *)(unsigned long)req32.boxes,
268 &request->boxes))
H A Di810_drm.h161 drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS]; member in struct:_drm_i810_sarea
H A Dvia_drm.h185 drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS]; member in struct:_drm_via_sarea
H A Dmga_state.c488 drm_clip_rect_t *pbox = sarea_priv->boxes;
576 drm_clip_rect_t *pbox = sarea_priv->boxes;
644 &sarea_priv->boxes[i]);
691 &sarea_priv->boxes[i]);
774 drm_clip_rect_t *pbox = sarea_priv->boxes;
H A Dradeon_drm.h420 drm_clip_rect_t boxes[RADEON_NR_SAREA_CLIPRECTS]; member in struct:__anon4232
607 drm_clip_rect_t __user *boxes; member in struct:drm_radeon_cmd_buffer
H A Di830_drm.h194 drm_clip_rect_t boxes[I830_NR_SAREA_CLIPRECTS]; member in struct:_drm_i830_sarea
226 int perf_boxes; /* performance boxes to be displayed */
H A Di915_dma.c400 drm_clip_rect_t __user * boxes,
407 if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
493 drm_clip_rect_t __user *boxes = batch->cliprects; local
509 int ret = i915_emit_box(dev, boxes, i,
399 i915_emit_box(drm_device_t * dev, drm_clip_rect_t __user * boxes, int i, int DR1, int DR4) argument
H A Dmga_drm.h180 drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; member in struct:_drm_mga_sarea
185 * exported_ fields and puts the cliprects into boxes, above.
188 * clobbering the boxes data.
H A Dr128_drm.h156 drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS]; member in struct:drm_r128_sarea
H A Dradeon_drv.h234 u32 boxes; member in struct:drm_radeon_private::__anon4235
302 drm_clip_rect_t __user *boxes; member in struct:drm_radeon_kcmd_buffer
381 /* Flags for stats.boxes
1061 if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE)) { \
1064 dev_priv->stats.boxes |= RADEON_BOX_DMA_IDLE; \
H A Di830_dma.c799 x += dev_priv->sarea_priv->boxes[0].x1;
800 y += dev_priv->sarea_priv->boxes[0].y1;
880 drm_clip_rect_t *pbox = sarea_priv->boxes;
972 drm_clip_rect_t *pbox = sarea_priv->boxes;
1086 drm_clip_rect_t *box = sarea_priv->boxes;
H A Di810_dma.c678 drm_clip_rect_t *pbox = sarea_priv->boxes;
751 drm_clip_rect_t *pbox = sarea_priv->boxes;
798 drm_clip_rect_t *box = sarea_priv->boxes;
H A Dradeon_cp.c874 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
899 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
920 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
2096 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
H A Dr300_cmdbuf.c75 (&box, &cmdbuf->boxes[n + i], sizeof(box))) {
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/ip2/
H A Dip2main.c3022 int boxes = 0; local
3035 boxes = 0;
3046 if( pB->i2eChannelMap[box] != 0 ) ++boxes;
3059 len += sprintf( page+len, " boxes=%d width=%d", boxes, pB->i2eDataWidth16 ? 16 : 8 );
3063 len += sprintf(page+len, "Board %d: ISA-4 ports=4 boxes=1", i );
3068 len += sprintf(page+len, "Board %d: ISA-8-std ports=8 boxes=1", i );
3073 len += sprintf(page+len, "Board %d: ISA-8-RJ11 ports=8 boxes=1", i );
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/Documentation/cdrom/
H A Dcdrom-standard.tex884 a media change once. For juke-boxes, an extra argument $arg$
892 $ioctl$ call to $CDROMSUBCHNL$. For juke-boxes, an extra argument
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/gettext-0.17/build-aux/
H A Dtexinfo.tex195 % that mark overfull boxes (in case you have decided
2340 % Set up the default fonts, so we can use them for creating boxes.
4614 % followed by the two boxes we just split, in box0 and box2.
5840 \emergencystretch = 0pt % don't try to avoid overfull boxes
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/mtools-4.0.10/
H A Dtexinfo.tex199 % that mark overfull boxes (in case you have decided
2385 % Set up the default fonts, so we can use them for creating boxes.
4856 % followed by the two boxes we just split, in box0 and box2.
6062 \emergencystretch = 0pt % don't try to avoid overfull boxes

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