Searched refs:__reg (Results 1 - 12 of 12) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-frv/
H A Dirc-regs.h15 #define __reg(ADDR) (*(volatile unsigned long *)(ADDR)) macro
17 #define __get_TM0() ({ __reg(0xfeff9800); })
18 #define __get_TM1() ({ __reg(0xfeff9808); })
19 #define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0)
24 unsigned long tm1 = __reg(0xfeff9808); \
27 __reg(0xfeff9808) = tm1; \
31 #define __get_RS(C) ({ (__reg(0xfeff9810) >> ((C)+16)) & 1; })
33 #define __clr_RC(C) do { __reg(0xfeff9818) = 1 << ((C)+16); mb(); } while(0)
35 #define __get_MASK(C) ({ (__reg(0xfeff9820) >> ((C)+16)) & 1; })
36 #define __set_MASK(C) do { __reg(
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H A Dgpio-regs.h15 #define __reg(ADDR) (*(volatile unsigned long *)(ADDR)) macro
17 #define __get_PDR() ({ __reg(0xfeff0400); })
18 #define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0)
20 #define __get_GPDR() ({ __reg(0xfeff0408); })
21 #define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0)
23 #define __get_SIR() ({ __reg(0xfeff0410); })
24 #define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0)
26 #define __get_SOR() ({ __reg(0xfeff0418); })
27 #define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0)
29 #define __set_PDSR(V) do { __reg(
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H A Dserial-regs.h22 #define __get_UART0(R) ({ __reg(UART0_BASE + (R) * 8) >> 24; })
23 #define __get_UART1(R) ({ __reg(UART1_BASE + (R) * 8) >> 24; })
24 #define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0)
25 #define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/
H A DNCR53C9x.h147 #define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
148 #define esp_read(__reg) (__reg)
195 #define esp_write(__reg, __val) (*(__reg) = (__val))
196 #define esp_read(__reg) (*(__reg))
232 #define esp_write(__reg, __val) outb((__val), (__reg))
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sparc64/kernel/
H A Dpci_fire.c15 #define fire_read(__reg) \
19 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
23 #define fire_write(__reg, __val) \
26 : "r" (__val), "r" (__reg), \
H A Dpci_sabre.c30 #define sabre_read(__reg) \
34 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
38 #define sabre_write(__reg, __val) \
41 : "r" (__val), "r" (__reg), \
H A Dprom.c410 #define sabre_read(__reg) \
414 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
688 #define schizo_read(__reg) \
692 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
696 #define schizo_write(__reg, __val) \
699 : "r" (__val), "r" (__reg), \
H A Dpci_iommu.c25 #define pci_iommu_read(__reg) \
29 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
33 #define pci_iommu_write(__reg, __val) \
36 : "r" (__val), "r" (__reg), \
H A Dpci_psycho.c29 #define psycho_read(__reg) \
33 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
37 #define psycho_write(__reg, __val) \
40 : "r" (__val), "r" (__reg), \
H A Dpci_schizo.c28 #define schizo_read(__reg) \
32 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
36 #define schizo_write(__reg, __val) \
39 : "r" (__val), "r" (__reg), \
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/frv/kernel/
H A Dsetup.c692 __reg(UART0_BASE + UART_IER * 8) = 0;
696 __reg(UART1_BASE + UART_IER * 8) = 0;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Dsunhme.c243 #define hme_write32(__hp, __reg, __val) \
244 ((__hp)->write32((__reg), (__val)))
245 #define hme_read32(__hp, __reg) \
246 ((__hp)->read32(__reg))
264 #define hme_write32(__hp, __reg, __val) \
265 sbus_writel((__val), (__reg))
266 #define hme_read32(__hp, __reg) \
267 sbus_readl(__reg)
289 #define hme_write32(__hp, __reg, __val) \
290 writel((__val), (__reg))
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