Searched refs:TxINT_ENAB (Results 1 - 13 of 13) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/hamradio/
H A Dz8530.h39 #define TxINT_ENAB 0x2 /* Tx Int Enable */ macro
H A Dscc.c875 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
913 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */
1247 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */
H A Ddmascc.c1019 EXT_INT_ENAB | WT_FN_RDYFN | TxINT_ENAB);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/wan/
H A Dz85230.c216 1, EXT_INT_ENAB|TxINT_ENAB|INT_ALL_Rx,
241 1, EXT_INT_ENAB|TxINT_ENAB|INT_ALL_Rx,
809 c->regs[R1]|=TxINT_ENAB;
915 c->regs[R1]&= ~TxINT_ENAB;
925 c->regs[R1]&= ~TxINT_ENAB;
1111 c->regs[R1]&= ~TxINT_ENAB;
H A Dz85230.h60 #define TxINT_ENAB 0x2 /* Tx Int Enable */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/serial/
H A Dpmac_zilog.c136 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
330 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
939 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
974 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1297 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1305 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
1577 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1641 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
1915 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
H A Dip22zilog.c186 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
695 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
756 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1165 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
H A Dip22zilog.h71 #define TxINT_ENAB 0x2 /* Tx Int Enable */ macro
H A Dsunzilog.h63 #define TxINT_ENAB 0x2 /* Tx Int Enable */ macro
H A Dsunzilog.c201 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
797 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
858 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1308 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
1324 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
H A Dpmac_zilog.h157 #define TxINT_ENAB 0x2 /* Tx Int Enable */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/tc/
H A Dzs.h207 #define TxINT_ENAB 0x2 /* Tx Int Enable */ macro
H A Dzs.c669 info->zs_channel->curregs[R1] |= (RxINT_ALL | TxINT_ENAB |

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