Searched refs:TCR (Results 1 - 19 of 19) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-davinci/
H A Dtime.c68 #define TCR 0x20 macro
117 u32 tcr = davinci_readl(t->reg_base + TCR);
121 davinci_writel(tcr, t->reg_base + TCR);
134 davinci_writel(tcr, t->reg_base + TCR);
187 davinci_writel(0, base + TCR);
337 davinci_writel(0, base + TCR);
341 davinci_writel(tgcr, base + TCR);
345 davinci_writel(tgcr, base + TCR);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/h8300/platform/h8300h/generic/
H A Dtimer.c57 #define TCR 0x00ffff64 macro
74 ctrl_outb(0x80|CCLR_CMGRA|CLK_DIV8, TCR); /* set ITU0 clock */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Dsmc9194.h64 #define TCR 0 /* transmit control register */ macro
72 /* the normal settings for the TCR register : */
H A Dsmc9194.c360 outw( TCR_CLEAR, ioaddr + TCR );
390 /* see the header file for options in TCR/RCR NORMAL*/
391 outw( TCR_NORMAL, ioaddr + TCR );
422 outb( TCR_CLEAR, ioaddr + TCR );
1313 outw( inw( ioaddr + TCR ) | TCR_ENABLE, ioaddr + TCR ); local
H A Dariadne.h381 volatile u_char TCR; /* Timer Control Register */ member in struct:MC68230
H A Dvia-velocity.c1630 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1632 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1912 td_ptr->tdesc1.TCR = TCR0_TIC;
1991 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2001 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2003 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2004 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2634 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2640 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
H A Dvia-velocity.h240 u8 TCR; member in struct:tdesc1
449 * Bits in the TCR register
1013 volatile u8 TCR; member in struct:mac_regs
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/libid3tag-0.15.0b/
H A Dcompat.c188 {"TCR", EQ(TCOP) /* Copyright message */},
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/packages/libid3tag-0.15.0b/
H A Dcompat.c185 {"TCR", EQ(TCOP) /* Copyright message */},
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/pcmcia/
H A Dsmc91c92_cs.c163 #define TCR 0 /* transmit control register */ macro
1265 mask_bits(0xff00, ioaddr + TCR);
1461 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); local
1493 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); local
1836 outw(TCR_CLEAR, ioaddr + TCR);
1865 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1962 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR); local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/spi/
H A Datmel_spi.c154 spi_writel(as, TCR, len);
275 spi_readl(as, TCR), spi_readl(as, RCR));
284 spi_writel(as, TCR, 0);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/
H A Dsynclink_gt.c409 #define TCR 0x82 /* tx control */ macro
1456 value = rd_reg16(info, TCR);
1461 wr_reg16(info, TCR, value);
2264 unsigned short val = rd_reg16(info, TCR);
2265 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
2266 wr_reg16(info, TCR, val); /* clear reset bit */
2822 /* TCR (tx control) 07 1=RTS driver control */
2823 val = rd_reg16(info, TCR);
2828 wr_reg16(info, TCR, val);
3862 wr_reg16(info, TCR,
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/wan/
H A Dhd64572.h111 #define TCR 0x152 /* Tx DMA Critical Request Reg */ macro
H A Dhd6457x.c573 sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */
H A Dpc300_drv.c2262 printk("TCR=0x%02x, RCR=0x%02x, TNR1=0x%02x, RNR=0x%02x\n",
2263 cpc_readb(scabase + M_REG(TCR, ch)),
2843 cpc_writeb(scabase + M_REG(TCR, ch), 8);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/usb/
H A Drtl8150.c28 #define TCR 0x012f macro
678 set_registers(dev, TCR, 1, &tcr);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-m68knommu/
H A DMC68EZ328.h603 #define TCR WORD_REF(TCR_ADDR) macro
607 #define TCR1 TCR
H A DMC68VZ328.h696 #define TCR WORD_REF(TCR_ADDR) macro
700 #define TCR1 TCR
H A DMC68328.h748 #define TCR TCR1 macro

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