Searched refs:SR_INT (Results 1 - 5 of 5) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/macintosh/
H A Dvia-cuda.c68 #define SR_INT 0x04 /* Shift register full/empty */ macro
165 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
238 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
268 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
274 out_8(&via[IFR], SR_INT);
283 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)");
285 out_8(&via[IFR], SR_INT);
292 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)");
294 out_8(&via[IFR], SR_INT);
460 if ((in_8(&via[IFR]) & SR_INT)
[all...]
H A Dvia-maciisi.c57 #define SR_INT 0x04 /* Shift register full/empty */ macro
151 via[IER] = IER_CLR | SR_INT;
165 while (!(via[IFR] & SR_INT) && poll_timeout-- > 0)
187 via[IER] = IER_SET | SR_INT;
206 via[IER] = IER_SET | SR_INT;
210 via[IFR] = SR_INT;
422 if (via[IFR] & SR_INT) {
452 if (!(via[IFR] & SR_INT)) {
460 /* via[IFR] = SR_INT; */
H A Dvia-macii.c73 #define SR_INT 0x04 /* Shift register full/empty */ macro
375 * generating shift register interrupts (SR_INT) for us. This means there has
396 if (via[IFR] & SR_INT)
397 via[IFR] = SR_INT;
H A Dvia-pmu68k.c78 #define SR_INT 0x04 /* Shift register full/empty */ macro
561 if (via1[IFR] & SR_INT) {
562 via1[IFR] = SR_INT;
583 printk(KERN_DEBUG "PMU: SR_INT but ack still high! (%x)\n", via2[B]);
H A Dvia-pmu.c111 #define SR_INT 0x04 /* Shift register full/empty */ macro
440 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1440 out_8(&via[IFR], SR_INT);
1553 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1568 if (intr & SR_INT) {
1988 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);

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