1/*
2 * Device driver for the via ADB on (many) Mac II-class machines
3 *
4 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
5 * Also derived from code Copyright (C) 1996 Paul Mackerras.
6 *
7 * With various updates provided over the years by Michael Schmitz,
8 * Guideo Koerber and others.
9 *
10 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
11 *
12 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
13 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
14 * 				- Big overhaul, should actually work now.
15 * 2006-12-31 Finn Thain <fthain@telegraphics.com.au> - Another overhaul.
16 *
17 * Suggested reading:
18 *   Inside Macintosh, ch. 5 ADB Manager
19 *   Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
20 *   Rockwell R6522 VIA datasheet
21 *
22 * Apple's "ADB Analyzer" bus sniffer is invaluable:
23 *   ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
24 */
25
26#include <stdarg.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/delay.h>
31#include <linux/adb.h>
32#include <linux/interrupt.h>
33#include <linux/init.h>
34#include <asm/macintosh.h>
35#include <asm/macints.h>
36#include <asm/machw.h>
37#include <asm/mac_via.h>
38#include <asm/system.h>
39
40static volatile unsigned char *via;
41
42/* VIA registers - spaced 0x200 bytes apart */
43#define RS		0x200		/* skip between registers */
44#define B		0		/* B-side data */
45#define A		RS		/* A-side data */
46#define DIRB		(2*RS)		/* B-side direction (1=output) */
47#define DIRA		(3*RS)		/* A-side direction (1=output) */
48#define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */
49#define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */
50#define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */
51#define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */
52#define T2CL		(8*RS)		/* Timer 2 ctr/latch (low 8 bits) */
53#define T2CH		(9*RS)		/* Timer 2 counter (high 8 bits) */
54#define SR		(10*RS)		/* Shift register */
55#define ACR		(11*RS)		/* Auxiliary control register */
56#define PCR		(12*RS)		/* Peripheral control register */
57#define IFR		(13*RS)		/* Interrupt flag register */
58#define IER		(14*RS)		/* Interrupt enable register */
59#define ANH		(15*RS)		/* A-side data, no handshake */
60
61/* Bits in B data register: all active low */
62#define CTLR_IRQ	0x08		/* Controller rcv status (input) */
63#define ST_MASK		0x30		/* mask for selecting ADB state bits */
64
65/* Bits in ACR */
66#define SR_CTRL		0x1c		/* Shift register control bits */
67#define SR_EXT		0x0c		/* Shift on external clock */
68#define SR_OUT		0x10		/* Shift out if 1 */
69
70/* Bits in IFR and IER */
71#define IER_SET		0x80		/* set bits in IER */
72#define IER_CLR		0		/* clear bits in IER */
73#define SR_INT		0x04		/* Shift register full/empty */
74
75/* ADB transaction states according to GMHW */
76#define ST_CMD		0x00		/* ADB state: command byte */
77#define ST_EVEN		0x10		/* ADB state: even data byte */
78#define ST_ODD		0x20		/* ADB state: odd data byte */
79#define ST_IDLE		0x30		/* ADB state: idle, nothing to send */
80
81static int  macii_init_via(void);
82static void macii_start(void);
83static irqreturn_t macii_interrupt(int irq, void *arg);
84static void macii_queue_poll(void);
85
86static int macii_probe(void);
87static int macii_init(void);
88static int macii_send_request(struct adb_request *req, int sync);
89static int macii_write(struct adb_request *req);
90static int macii_autopoll(int devs);
91static void macii_poll(void);
92static int macii_reset_bus(void);
93
94struct adb_driver via_macii_driver = {
95	"Mac II",
96	macii_probe,
97	macii_init,
98	macii_send_request,
99	macii_autopoll,
100	macii_poll,
101	macii_reset_bus
102};
103
104static enum macii_state {
105	idle,
106	sending,
107	reading,
108	read_done,
109} macii_state;
110
111static struct adb_request *current_req; /* first request struct in the queue */
112static struct adb_request *last_req;     /* last request struct in the queue */
113static unsigned char reply_buf[16];        /* storage for autopolled replies */
114static unsigned char *reply_ptr;      /* next byte in req->data or reply_buf */
115static int reading_reply;        /* store reply in reply_buf else req->reply */
116static int data_index;      /* index of the next byte to send from req->data */
117static int reply_len; /* number of bytes received in reply_buf or req->reply */
118static int status;          /* VIA's ADB status bits captured upon interrupt */
119static int last_status;              /* status bits as at previous interrupt */
120static int srq_asserted;     /* have to poll for the device that asserted it */
121static int command_byte;         /* the most recent command byte transmitted */
122static int autopoll_devs;      /* bits set are device addresses to be polled */
123
124/* Sanity check for request queue. Doesn't check for cycles. */
125static int request_is_queued(struct adb_request *req) {
126	struct adb_request *cur;
127	unsigned long flags;
128	local_irq_save(flags);
129	cur = current_req;
130	while (cur) {
131		if (cur == req) {
132			local_irq_restore(flags);
133			return 1;
134		}
135		cur = cur->next;
136	}
137	local_irq_restore(flags);
138	return 0;
139}
140
141/* Check for MacII style ADB */
142static int macii_probe(void)
143{
144	if (macintosh_config->adb_type != MAC_ADB_II) return -ENODEV;
145
146	via = via1;
147
148	printk("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
149	return 0;
150}
151
152/* Initialize the driver */
153int macii_init(void)
154{
155	unsigned long flags;
156	int err;
157
158	local_irq_save(flags);
159
160	err = macii_init_via();
161	if (err) goto out;
162
163	err = request_irq(IRQ_MAC_ADB, macii_interrupt, IRQ_FLG_LOCK, "ADB",
164			  macii_interrupt);
165	if (err) goto out;
166
167	macii_state = idle;
168out:
169	local_irq_restore(flags);
170	return err;
171}
172
173/* initialize the hardware */
174static int macii_init_via(void)
175{
176	unsigned char x;
177
178	/* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
179	via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
180
181	/* Set up state: idle */
182	via[B] |= ST_IDLE;
183	last_status = via[B] & (ST_MASK|CTLR_IRQ);
184
185	/* Shift register on input */
186	via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
187
188	/* Wipe any pending data and int */
189	x = via[SR];
190
191	return 0;
192}
193
194/* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
195static void macii_queue_poll(void)
196{
197	/* No point polling the active device as it will never assert SRQ, so
198	 * poll the next device in the autopoll list. This could leave us
199	 * stuck in a polling loop if an unprobed device is asserting SRQ.
200	 * In theory, that could only happen if a device was plugged in after
201	 * probing started. Unplugging it again will break the cycle.
202	 * (Simply polling the next higher device often ends up polling almost
203	 * every device (after wrapping around), which takes too long.)
204	 */
205	int device_mask;
206	int next_device;
207	static struct adb_request req;
208
209	if (!autopoll_devs) return;
210
211	device_mask = (1 << (((command_byte & 0xF0) >> 4) + 1)) - 1;
212	if (autopoll_devs & ~device_mask)
213		next_device = ffs(autopoll_devs & ~device_mask) - 1;
214	else
215		next_device = ffs(autopoll_devs) - 1;
216
217	BUG_ON(request_is_queued(&req));
218
219	adb_request(&req, NULL, ADBREQ_NOSEND, 1,
220	            ADB_READREG(next_device, 0));
221
222	req.sent = 0;
223	req.complete = 0;
224	req.reply_len = 0;
225	req.next = current_req;
226
227	if (current_req != NULL) {
228		current_req = &req;
229	} else {
230		current_req = &req;
231		last_req = &req;
232	}
233}
234
235/* Send an ADB request; if sync, poll out the reply 'till it's done */
236static int macii_send_request(struct adb_request *req, int sync)
237{
238	int err;
239	unsigned long flags;
240
241	BUG_ON(request_is_queued(req));
242
243	local_irq_save(flags);
244	err = macii_write(req);
245	local_irq_restore(flags);
246
247	if (!err && sync) {
248		while (!req->complete) {
249			macii_poll();
250		}
251		BUG_ON(request_is_queued(req));
252	}
253
254	return err;
255}
256
257/* Send an ADB request (append to request queue) */
258static int macii_write(struct adb_request *req)
259{
260	if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
261		req->complete = 1;
262		return -EINVAL;
263	}
264
265	req->next = NULL;
266	req->sent = 0;
267	req->complete = 0;
268	req->reply_len = 0;
269
270	if (current_req != NULL) {
271		last_req->next = req;
272		last_req = req;
273	} else {
274		current_req = req;
275		last_req = req;
276		if (macii_state == idle) macii_start();
277	}
278	return 0;
279}
280
281/* Start auto-polling */
282static int macii_autopoll(int devs)
283{
284	static struct adb_request req;
285	unsigned long flags;
286	int err = 0;
287
288	/* bit 1 == device 1, and so on. */
289	autopoll_devs = devs & 0xFFFE;
290
291	if (!autopoll_devs) return 0;
292
293	local_irq_save(flags);
294
295	if (current_req == NULL) {
296		/* Send a Talk Reg 0. The controller will repeatedly transmit
297		 * this as long as it is idle.
298		 */
299		adb_request(&req, NULL, ADBREQ_NOSEND, 1,
300		            ADB_READREG(ffs(autopoll_devs) - 1, 0));
301		err = macii_write(&req);
302	}
303
304	local_irq_restore(flags);
305	return err;
306}
307
308static inline int need_autopoll(void) {
309	/* Was the last command Talk Reg 0
310	 * and is the target on the autopoll list?
311	 */
312	if ((command_byte & 0x0F) == 0x0C &&
313	    ((1 << ((command_byte & 0xF0) >> 4)) & autopoll_devs))
314		return 0;
315	return 1;
316}
317
318/* Prod the chip without interrupts */
319static void macii_poll(void)
320{
321	disable_irq(IRQ_MAC_ADB);
322	macii_interrupt(0, NULL);
323	enable_irq(IRQ_MAC_ADB);
324}
325
326/* Reset the bus */
327static int macii_reset_bus(void)
328{
329	static struct adb_request req;
330
331	if (request_is_queued(&req))
332		return 0;
333
334	/* Command = 0, Address = ignored */
335	adb_request(&req, NULL, 0, 1, ADB_BUSRESET);
336
337	/* Don't want any more requests during the Global Reset low time. */
338	udelay(3000);
339
340	return 0;
341}
342
343/* Start sending ADB packet */
344static void macii_start(void)
345{
346	struct adb_request *req;
347
348	req = current_req;
349
350	BUG_ON(req == NULL);
351
352	BUG_ON(macii_state != idle);
353
354	/* Now send it. Be careful though, that first byte of the request
355	 * is actually ADB_PACKET; the real data begins at index 1!
356	 * And req->nbytes is the number of bytes of real data plus one.
357	 */
358
359	/* store command byte */
360	command_byte = req->data[1];
361	/* Output mode */
362	via[ACR] |= SR_OUT;
363	/* Load data */
364	via[SR] = req->data[1];
365	/* set ADB state to 'command' */
366	via[B] = (via[B] & ~ST_MASK) | ST_CMD;
367
368	macii_state = sending;
369	data_index = 2;
370}
371
372/*
373 * The notorious ADB interrupt handler - does all of the protocol handling.
374 * Relies on the ADB controller sending and receiving data, thereby
375 * generating shift register interrupts (SR_INT) for us. This means there has
376 * to be activity on the ADB bus. The chip will poll to achieve this.
377 *
378 * The basic ADB state machine was left unchanged from the original MacII code
379 * by Alan Cox, which was based on the CUDA driver for PowerMac.
380 * The syntax of the ADB status lines is totally different on MacII,
381 * though. MacII uses the states Command -> Even -> Odd -> Even ->...-> Idle
382 * for sending and Idle -> Even -> Odd -> Even ->...-> Idle for receiving.
383 * Start and end of a receive packet are signalled by asserting /IRQ on the
384 * interrupt line (/IRQ means the CTLR_IRQ bit in port B; not to be confused
385 * with the VIA shift register interrupt. /IRQ never actually interrupts the
386 * processor, it's just an ordinary input.)
387 */
388static irqreturn_t macii_interrupt(int irq, void *arg)
389{
390	int x;
391	static int entered;
392	struct adb_request *req;
393
394	if (!arg) {
395		/* Clear the SR IRQ flag when polling. */
396		if (via[IFR] & SR_INT)
397			via[IFR] = SR_INT;
398		else
399			return IRQ_NONE;
400	}
401
402	BUG_ON(entered++);
403
404	last_status = status;
405	status = via[B] & (ST_MASK|CTLR_IRQ);
406
407	switch (macii_state) {
408		case idle:
409			if (reading_reply) {
410				reply_ptr = current_req->reply;
411			} else {
412				BUG_ON(current_req != NULL);
413				reply_ptr = reply_buf;
414			}
415
416			x = via[SR];
417
418			if ((status & CTLR_IRQ) && (x == 0xFF)) {
419				/* Bus timeout without SRQ sequence:
420				 *     data is "FF" while CTLR_IRQ is "H"
421				 */
422				reply_len = 0;
423				srq_asserted = 0;
424				macii_state = read_done;
425			} else {
426				macii_state = reading;
427				*reply_ptr = x;
428				reply_len = 1;
429			}
430
431			/* set ADB state = even for first data byte */
432			via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
433			break;
434
435		case sending:
436			req = current_req;
437			if (data_index >= req->nbytes) {
438				req->sent = 1;
439				macii_state = idle;
440
441				if (req->reply_expected) {
442					reading_reply = 1;
443				} else {
444					req->complete = 1;
445					current_req = req->next;
446					if (req->done) (*req->done)(req);
447
448					if (current_req)
449						macii_start();
450					else
451						if (need_autopoll())
452							macii_autopoll(autopoll_devs);
453				}
454
455				if (macii_state == idle) {
456					/* reset to shift in */
457					via[ACR] &= ~SR_OUT;
458					x = via[SR];
459					/* set ADB state idle - might get SRQ */
460					via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
461				}
462			} else {
463				via[SR] = req->data[data_index++];
464
465				if ( (via[B] & ST_MASK) == ST_CMD ) {
466					/* just sent the command byte, set to EVEN */
467					via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
468				} else {
469					/* invert state bits, toggle ODD/EVEN */
470					via[B] ^= ST_MASK;
471				}
472			}
473			break;
474
475		case reading:
476			x = via[SR];
477			BUG_ON((status & ST_MASK) == ST_CMD ||
478			       (status & ST_MASK) == ST_IDLE);
479
480			/* Bus timeout with SRQ sequence:
481			 *     data is "XX FF"      while CTLR_IRQ is "L L"
482			 * End of packet without SRQ sequence:
483			 *     data is "XX...YY 00" while CTLR_IRQ is "L...H L"
484			 * End of packet SRQ sequence:
485			 *     data is "XX...YY 00" while CTLR_IRQ is "L...L L"
486			 * (where XX is the first response byte and
487			 * YY is the last byte of valid response data.)
488			 */
489
490			srq_asserted = 0;
491			if (!(status & CTLR_IRQ)) {
492				if (x == 0xFF) {
493					if (!(last_status & CTLR_IRQ)) {
494						macii_state = read_done;
495						reply_len = 0;
496						srq_asserted = 1;
497					}
498				} else if (x == 0x00) {
499					macii_state = read_done;
500					if (!(last_status & CTLR_IRQ))
501						srq_asserted = 1;
502				}
503			}
504
505			if (macii_state == reading) {
506				BUG_ON(reply_len > 15);
507				reply_ptr++;
508				*reply_ptr = x;
509				reply_len++;
510			}
511
512			/* invert state bits, toggle ODD/EVEN */
513			via[B] ^= ST_MASK;
514			break;
515
516		case read_done:
517			x = via[SR];
518
519			if (reading_reply) {
520				reading_reply = 0;
521				req = current_req;
522				req->reply_len = reply_len;
523				req->complete = 1;
524				current_req = req->next;
525				if (req->done) (*req->done)(req);
526			} else if (reply_len && autopoll_devs)
527				adb_input(reply_buf, reply_len, 0);
528
529			macii_state = idle;
530
531			/* SRQ seen before, initiate poll now */
532			if (srq_asserted)
533				macii_queue_poll();
534
535			if (current_req)
536				macii_start();
537			else
538				if (need_autopoll())
539					macii_autopoll(autopoll_devs);
540
541			if (macii_state == idle)
542				via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
543			break;
544
545		default:
546		break;
547	}
548
549	entered--;
550	return IRQ_HANDLED;
551}
552