Searched refs:SPI_TDBR (Results 1 - 8 of 8) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf533/
H A DcdefBF532.h545 #define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
546 #define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR,val)
H A DdefBF532.h107 #define SPI_TDBR 0xFFC0050C /* SPI Transmit Data Buffer Register */ macro
970 #define TXE 0x00000004 /* Set (=1) when transmission occurs with no new data in SPI_TDBR */
971 #define TXS 0x00000008 /* SPI_TDBR Data Buffer Status (0=Empty, 1=Full) */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf527/
H A DcdefBF52x_base.h164 #define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
165 #define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR, val)
H A DdefBF52x_base.h108 #define SPI_TDBR 0xFFC0050C /* SPI Transmit Data Buffer Register */ macro
931 #define TXS 0x0008 /* SPI_TDBR Data Buffer Status (Full/Empty*) */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A DdefBF561.h122 #define SPI_TDBR 0xFFC0050C /* SPI Transmit Data Buffer Register */ macro
1404 #define TXE 0x00000004 /* Set (=1) when transmission occurs with no new data in SPI_TDBR */
1405 #define TXS 0x00000008 /* SPI_TDBR Data Buffer Status (0=Empty, 1=Full) */
H A DcdefBF561.h203 #define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
204 #define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR,val)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf537/
H A DcdefBF534.h152 #define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
153 #define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR,val)
H A DdefBF534.h92 #define SPI_TDBR 0xFFC0050C /* SPI Transmit Data Buffer Register */ macro
1196 #define TXS 0x0008 /* SPI_TDBR Data Buffer Status (Full/Empty*) */

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