Searched refs:SERDES_PLL_CTRL (Results 1 - 2 of 2) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/include/
H A Dpcie_core.h338 #define SERDES_PLL_CTRL 1 /* PLL control reg */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/shared/
H A Dnicpci.c898 pcie_mdioread(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, &w);
901 pcie_mdiowrite(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, w);

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