Searched refs:MV64x60_TIMR_CNTR_0_3_CNTL (Results 1 - 7 of 7) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/platforms/
H A Dcpci690.c208 mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
H A Dev64260.c189 mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
H A Dev64360.c203 mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
H A Dkatana.c431 mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
H A Dradstone_ppc7d.c961 val32 = mv64x60_read(&bh, MV64x60_TIMR_CNTR_0_3_CNTL);
963 mv64x60_write(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, val32);
H A Dhdpu.c141 mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-ppc/
H A Dmv64x60_defs.h766 #define MV64x60_TIMR_CNTR_0_3_CNTL 0x0864 macro

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