Searched refs:MDREFR (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-sa1100/
H A Dcpu-sa1110.c177 sd->mdrefr = MDREFR & 0xffbffff0;
187 printk("MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n",
197 MDREFR = (MDREFR & 0xffff000f) | (dri << 4);
198 (void) MDREFR;
279 str %4, [%1, #28] @ MDREFR \n\
H A Dsleep.S65 ldr r0, =MDREFR
97 ldr r6, =MDREFR
126 @ Step 2 clear DRI field in MDREFR
129 @ Step 3 set SLFRSH bit in MDREFR
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pxa/
H A Dpm.c106 SAVE(MDREFR);
168 RESTORE(MDREFR);
H A Dsleep.S77 ldr r4, =MDREFR
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-sa1100/
H A DSA-1100.h1559 #define MDREFR __REG(0xA000001C) macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-pxa/
H A Dpxa-regs.h2017 #define MDREFR __REG(0x48000004) /* SDRAM Refresh Control Register */ macro

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