Searched refs:MDIO_DEV_TXPLL (Results 1 - 2 of 2) sorted by relevance
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/include/ |
H A D | pcie_core.h | 310 #define MDIO_DEV_TXPLL 0x808 /* TXPLL register block idx */ macro
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/shared/ |
H A D | nicpci.c | 1835 pcie_mdioread(pi, MDIO_DEV_TXPLL, 0x11, ®_val); 1836 bcm_bprintf(b, "MDIO_DEV_TXPLL, pllcontrol: 0x%x\n", reg_val); 1837 pcie_mdioread(pi, MDIO_DEV_TXPLL, 0x12, ®_val); 1838 bcm_bprintf(b, "MDIO_DEV_TXPLL, plltimer1: 0x%x\n", reg_val); 1839 pcie_mdioread(pi, MDIO_DEV_TXPLL, 0x13, ®_val); 1840 bcm_bprintf(b, "MDIO_DEV_TXPLL, plltimer2: 0x%x\n", reg_val); 1841 pcie_mdioread(pi, MDIO_DEV_TXPLL, 0x14, ®_val); 1842 bcm_bprintf(b, "MDIO_DEV_TXPLL, plltimer3: 0x%x\n", reg_val); 1843 pcie_mdioread(pi, MDIO_DEV_TXPLL, 0x17, ®_val); 1844 bcm_bprintf(b, "MDIO_DEV_TXPLL, freqdetcounte [all...] |
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