/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-pnx4008/ |
H A D | timex.h | 26 #define MSTIM_INT IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x0)) 27 #define MSTIM_CTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x4)) 28 #define MSTIM_COUNTER IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x8)) 29 #define MSTIM_MCTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x14)) 30 #define MSTIM_MATCH0 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x18)) 31 #define MSTIM_MATCH1 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x1c)) 35 #define HSTIM_INT IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x0)) 36 #define HSTIM_CTRL IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x4)) 37 #define HSTIM_COUNTER IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x8)) 38 #define HSTIM_PMATCH IO_ADDRESS((PNX4008_HSTIMER_BAS [all...] |
H A D | irq.h | 18 #define MIC_VA_BASE IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) 19 #define SIC1_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) 20 #define SIC2_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) 26 #define INTC_ER(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x0 + (((irq)&(0x3<<5))<<9))) 27 #define INTC_RSR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x4 + (((irq)&(0x3<<5))<<9))) 28 #define INTC_SR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x8 + (((irq)&(0x3<<5))<<9))) 29 #define INTC_APR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0xC + (((irq)&(0x3<<5))<<9))) 30 #define INTC_ATR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x10 + (((irq)&(0x3<<5))<<9))) 31 #define INTC_ITR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x14 + (((irq)&(0x3<<5))<<9))) 35 #define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BAS [all...] |
H A D | hardware.h | 30 #define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) macro
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H A D | clock.h | 19 #define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE) 44 #define AUDIOCONFIG_VA_BASE IO_ADDRESS(PNX4008_AUDIOCONFIG_BASE) 50 #define USB_OTG_CLKCTRL_REG IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xff4) 52 #define VFP9CLKCTRL_REG IO_ADDRESS(PNX4008_DEBUG_BASE)
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H A D | entry-macro.S | 16 #define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) define 39 ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) 72 ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) 74 ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) 88 ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) 90 ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-realview/ |
H A D | hardware.h | 29 #define IO_ADDRESS(x) ((((x) & 0x0effffff) | (((x) >> 4) & 0x0f000000)) + 0xf0000000) macro 30 #define __io_address(n) __io(IO_ADDRESS(n))
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-versatile/ |
H A D | system.h | 41 val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7; 44 __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK)); 45 __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL)); 46 __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
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H A D | hardware.h | 42 #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) macro
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-omap/ |
H A D | serial.h | 30 if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ 31 p == IO_ADDRESS(OMAP_UART2_BASE) || \ 32 p == IO_ADDRESS(OMAP_UART3_BASE)) \
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H A D | io.h | 62 #define IO_ADDRESS(pa) ((pa) - IO_OFFSET) macro 76 #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ macro 100 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses 104 #define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 105 #define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 106 #define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 108 #define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) 109 #define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) 110 #define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
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H A D | omap24xx.h | 15 #define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
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H A D | mtd-xip.h | 28 ((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-davinci/ |
H A D | io.h | 27 #define IO_ADDRESS(x) io_p2v(x) macro 45 * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses 49 #define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 50 #define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 51 #define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 53 #define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) 54 #define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) 55 #define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
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H A D | entry-macro.S | 18 ldr \base, =IO_ADDRESS(DAVINCI_ARM_INTC_BASE)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-omap/ |
H A D | sram-fn.S | 24 mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 25 orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000 26 orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00 28 mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000 29 orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 30 orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-omap2/ |
H A D | sleep.S | 29 #define A_32KSYNC_CR_V IO_ADDRESS(OMAP_TIMER32K_BASE+0x10) 30 #define A_PRCM_VOLTCTRL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x50) 31 #define A_PRCM_CLKCFG_CTRL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x80) 32 #define A_CM_CLKEN_PLL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x500) 33 #define A_CM_IDLEST_CKGEN_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x520) 34 #define A_CM_CLKSEL1_PLL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x540) 35 #define A_CM_CLKSEL2_PLL_V IO_ADDRESS(OMAP24XX_PRCM_BASE+0x544) 37 #define A_SDRC_DLLA_CTRL_V IO_ADDRESS(OMAP24XX_SDRC_BASE+0x60) 38 #define A_SDRC_POWER_V IO_ADDRESS(OMAP24XX_SDRC_BASE+0x70) 39 #define A_SDRC_RFR_CTRL_V IO_ADDRESS(OMAP24XX_SDRC_BAS [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pnx4008/ |
H A D | serial.c | 33 #define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE) 34 #define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE) 35 #define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE) 36 #define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
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H A D | core.c | 108 .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)), 117 .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)), 149 .start = IO_ADDRESS(PNX4008_USB_CONFIG_BASE), 150 .end = IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0x100), 231 .virtual = IO_ADDRESS(PNX4008_IRAM_BASE), 236 .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE), 241 .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE), 246 .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE), 251 .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE),
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-integrator/ |
H A D | hardware.h | 40 #define IO_ADDRESS(x) (((x) >> 4) + IO_BASE) macro
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H A D | entry-macro.S | 23 ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) 26 ldr \base, =IO_ADDRESS(INTEGRATOR_HDR_BASE)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-integrator/ |
H A D | integrator_ap.c | 48 #define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) 49 #define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE) 50 #define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE) 51 #define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_IC_OFFSET 73 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE), 78 .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE), 83 .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), 88 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE), 93 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE), 98 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BAS [all...] |
H A D | core.c | 132 #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET) 133 #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET) 165 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET 190 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000) 191 #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100) 192 #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200) 193 #define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-realview/ |
H A D | realview_eb.c | 47 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), 52 .virtual = IO_ADDRESS(REALVIEW_GIC_CPU_BASE), 57 .virtual = IO_ADDRESS(REALVIEW_GIC_DIST_BASE), 64 .virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE), 69 .virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE), 74 .virtual = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE), 81 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), 86 .virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE), 91 .virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE), 98 .virtual = IO_ADDRESS(REALVIEW_UART0_BAS [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-davinci/ |
H A D | psc.c | 35 #define MDSTAT IO_ADDRESS(0x01C41800) 36 #define MDCTL IO_ADDRESS(0x01C41A00)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-imx/ |
H A D | hardware.h | 27 # define __REG(x) (*((volatile u32 *)IO_ADDRESS(x))) 68 #define IO_ADDRESS(x) ((x) | IMX_IO_BASE) macro
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