Searched refs:FPGA_REG1A_PE0_REFCLK_ENABLE (Results 1 - 2 of 2) sorted by relevance
| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/platforms/4xx/ | ||
| H A D | yucca.h | 49 #define FPGA_REG1A_PE0_REFCLK_ENABLE 0x0040 macro |
| H A D | yucca.c | 189 clock = FPGA_REG1A_PE0_REFCLK_ENABLE; |
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