| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/ |
| H A D | bcmsdpcm.h | 203 (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].xmt) : \
204 (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].rcv))
208 (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].xmt) : \
209 (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].rcv))
218 (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.xmt) : \
219 (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.rcv))
228 ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod32.dmafifo)) : \
229 ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod64.dmafifo)))
232 ((dma32diag_t *)(uintptr)&((h)->regs->dma.pcm32.dmafifo))
|
| H A D | typedefs.h | 72 typedef ULONG_PTR uintptr; typedef
75 typedef unsigned long long int uintptr; typedef
288 /* define [u]int8/16/32/64, uintptr */
307 typedef unsigned int uintptr; typedef
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| H A D | bcmutils.h | 549 #define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \
554 #define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member)
634 (((uintptr)src1 | (uintptr)src2 | (uintptr)dst) & 3) == 0) {
|
| H A D | linux_osl.h | 179 #define OSL_WRITE_REG(osh, r, v) (bcmjtag_write(NULL, (uintptr)(r), (v), sizeof(*(r))))
180 #define OSL_READ_REG(osh, r) (bcmjtag_read(NULL, (uintptr)(r), sizeof(*(r))))
291 readb((volatile uint8*)((uintptr)(r)^3)); break; \
293 readw((volatile uint16*)((uintptr)(r)^2)); break; \
305 (volatile uint8*)((uintptr)(r)^3)); break; \
307 (volatile uint16*)((uintptr)(r)^2)); break; \
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| H A D | hnddma.h | 67 typedef uintptr (*di_getvar_t)(hnddma_t *dmah, const char *name);
|
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/brcm-boards/bcm947xx/ |
| H A D | perfcntr.c | 118 reg = (uintptr)data >> REGSHIFT;
119 sel = (uintptr)data & SELMASK;
137 reg = (uintptr)data >> REGSHIFT;
138 sel = (uintptr)data & SELMASK;
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| H A D | pcibios.c | 352 writel(0x1, (uintptr)regs + 0x524); /* write sel to enable */
355 writel(val, (uintptr)regs + 0x524);
357 writel(0x4ab, (uintptr)regs + 0x524);
359 tmp = readl((uintptr)regs + 0x528);
361 writel(0x80000000, (uintptr)regs + 0x528);
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/ |
| H A D | min_osl.c | 190 idx = *((uint32 *)OSL_UNCACHED((uintptr)&log_idx));
192 *((uint32 *)OSL_UNCACHED((uintptr)&log_idx)) = (idx + 1) & LOG_BUF_MASK;
|
| H A D | bcmstdlib.c | 632 if ((n >= 8) && (((uintptr)dest & 3) == 0)) {
670 if ((n >= 4) && (((uintptr)src & 3) == 0) && (((uintptr)dest & 3) == 0)) {
|
| H A D | flashutl.c | 91 flashutl_base = (void *)OSL_UNCACHED((uintptr)SI_FLASH2);
96 flashutl_base = (void *)OSL_UNCACHED((uintptr)SI_FLASH2);
98 flashutl_base = (void *)OSL_CACHED((uintptr)SI_FLASH2);
|
| H A D | load.c | 327 uintptr flbase;
343 flbase = (uintptr)OSL_UNCACHED((void *)SI_FLASH2);
|
| H A D | siutils_priv.h | 89 #define SI_INFO(sih) (si_info_t *)(uintptr)sih
93 #define GOODREGS(regs) ((regs) != NULL && ISALIGNED((uintptr)(regs), SI_CORE_SIZE))
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| H A D | hnddma.c | 220 static uintptr _dma_getvar(dma_info_t *di, const char *name);
781 DMA_FREE_CONSISTENT(di->osh, ((int8 *)(uintptr)di->txd64 - di->txdalign),
784 DMA_FREE_CONSISTENT(di->osh, ((int8 *)(uintptr)di->rxd64 - di->rxdalign),
788 DMA_FREE_CONSISTENT(di->osh, ((int8 *)(uintptr)di->txd32 - di->txdalign),
791 DMA_FREE_CONSISTENT(di->osh, ((int8 *)(uintptr)di->rxd32 - di->rxdalign),
978 BZERO_SM((void *)(uintptr)di->rxd64, (di->nrxd * sizeof(dma64dd_t)));
991 BZERO_SM((void *)(uintptr)di->rxd32, (di->nrxd * sizeof(dma32dd_t)));
1450 static uintptr
1454 return ((uintptr) &(di->hnddma.txavail));
1502 desc_strtaddr = (uint32)ROUNDUP((uintptr)v
[all...] |
| H A D | nicpci.c | 1091 bcmdumpfields(si_pcie_readreg, (void *)(uintptr)pi->sih, PCIE_PCIEREGS,
1092 (struct fielddesc *)(uintptr)pcie_plp_regdesc,
1098 bcmdumpfields(si_pcie_readreg, (void *)(uintptr)pi->sih, PCIE_PCIEREGS,
1099 (struct fielddesc *)(uintptr)pcie_dllp_regdesc,
1105 bcmdumpfields(si_pcie_readreg, (void *)(uintptr)pi->sih, PCIE_PCIEREGS,
1106 (struct fielddesc *)(uintptr)pcie_tlp_regdesc,
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| H A D | sflash.c | 247 else if ((len >= 4) && ((uintptr)buf & 3))
248 cnt = 4 - ((uintptr)buf & 3);
|
| H A D | aiutils.c | 240 sii->curwrap = (void *)((uintptr)regs + SI_CORE_SIZE);
249 eromptr = (uint32 *)(uintptr)erombase;
468 sii->curmap = regs = (void *)((uintptr)addr);
469 sii->curwrap = (void *)((uintptr)wrap);
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| H A D | sbutils.c | 74 sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
106 sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
238 sbaddr = (uint32)(uintptr)sii->curmap;
653 sii->regs[coreidx] = (void *)(uintptr)sbaddr;
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| H A D | siutils.c | 234 ASSERT((uintptr)cc);
330 ((sii->pch = (void *)(uintptr)pcicore_init(&sii->pub, sii->osh,
533 ai_scan(&sii->pub, (void *)(uintptr)cc, devid);
537 ub_scan(&sii->pub, (void *)(uintptr)cc, devid);
813 return R_REG(sii->osh, ((uint32 *)(uintptr)
1786 si_clkctl_setdelay(sii, (void *)(uintptr)cc);
2604 bcm_bprintf(b, "0x%x\t0x%x\n", i, *(uint32 *)((uintptr)cc + i));
2610 bcm_bprintf(b, "0x%x\t0x%x\n", i, *(uint32 *)((uintptr)cc + i));
2616 bcm_bprintf(b, "0x%x\t0x%x\n", i, *(uint32 *)((uintptr)cc + i));
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| H A D | hndpci.c | 524 ASSERT(ISALIGNED((uintptr)buf, len));
561 ASSERT(ISALIGNED((uintptr)buf, len));
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| H A D | bcmutils.c | 649 align64 = (uint)((uintptr)pktdata & 0x3f); /* aligned to 64B */
1857 ASSERT(ISALIGNED((uintptr)pktdata, sizeof(uint16)));
|
| H A D | linux_osl.c | 1451 *val = readl((uint32 *)(uintptr)addr);
|
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/sound/soc/bcm947xx/ |
| H A D | bcm947xx-i2s.c | 354 (void *)(uintptr)&(a->regs->dmaregs[fifonum].dmaxmt) : \
355 (void *)(uintptr)&(a->regs->dmaregs[fifonum].dmarcv))
|