Searched refs:pllcontrol_addr (Results 1 - 4 of 4) sorted by relevance
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/ |
H A D | hndpmu.c | 89 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, pllcontrol_addr), ~0, reg); 1295 W_REG(osh, &cc->pllcontrol_addr, PMU0_PLL0_PLLCTL0); 1393 W_REG(osh, &cc->pllcontrol_addr, PMU0_PLL0_PLLCTL0); 1402 W_REG(osh, &cc->pllcontrol_addr, PMU0_PLL0_PLLCTL1); 1416 W_REG(osh, &cc->pllcontrol_addr, PMU0_PLL0_PLLCTL2); 1462 W_REG(osh, &cc->pllcontrol_addr, PMU0_PLL0_PLLCTL0); 1910 W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); 1920 W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); 1992 W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); 2020 W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL [all...] |
H A D | hndmips.c | 985 W_REG(osh, &cc->pllcontrol_addr, PMU6_4706_PROCPLL_OFF + i); 986 (void)R_REG(osh, &cc->pllcontrol_addr); 1214 W_REG(osh, &cc->pllcontrol_addr, mainpll_pll0 + i); 1215 (void)R_REG(osh, &cc->pllcontrol_addr); 1228 W_REG(osh, &cc->pllcontrol_addr, mainpll_pll0 + i); 1229 (void)R_REG(osh, &cc->pllcontrol_addr);
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H A D | nflash.c | 249 W_REG(osh, &cc->pllcontrol_addr, 4);
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/ |
H A D | sbchipc.h | 283 uint32 pllcontrol_addr; member in struct:__anon3234
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