Searched refs:SI_CC_IDX (Results 1 - 13 of 13) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/
H A Dhndchipc.c74 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
147 if ((regs = si_setcoreidx(sih, SI_CC_IDX)) != NULL) {
295 regs = si_setcoreidx(sih, SI_CC_IDX);
H A Dhndpmu.c73 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol_addr), ~0, reg);
74 return si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol_data), mask, val);
81 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, regcontrol_addr), ~0, reg);
82 return si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, regcontrol_data), mask, val);
89 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, pllcontrol_addr), ~0, reg);
90 return si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, pllcontrol_data), mask, val);
97 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, pmucontrol),
111 cc = si_setcoreidx(sih, SI_CC_IDX);
138 cc = si_setcoreidx(sih, SI_CC_IDX);
299 si_corereg(sih, SI_CC_IDX, OFFSETO
[all...]
H A Dsiutils.c233 cc = si_setcoreidx(&sii->pub, SI_CC_IDX);
548 origidx = SI_CC_IDX;
585 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, 100);
656 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, gpiotimerval), ~0, w);
684 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol),
1407 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, clk_ctl_st), ~0, 0x2);
1431 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, pmuwatchdog), ~0, ticks);
1439 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, watchdog), ~0, ticks);
2520 si_corereg(&sii->pub, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol), ~0, w);
2725 return (si_setcoreidx(sih, SI_CC_IDX));
[all...]
H A Dbcmotp.c309 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
569 cc = si_setcoreidx(sih, SI_CC_IDX);
670 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
690 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
819 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
961 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
1113 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
1266 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
1344 cc = si_setcoreidx(oi->sih, SI_CC_IDX);
1591 if ((cc = si_setcoreidx(sih, SI_CC_IDX)) !
[all...]
H A Dload.c261 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
332 cc = si_setcoreidx(sih, SI_CC_IDX);
H A Dhndmips.c237 cc = si_setcoreidx(sih, SI_CC_IDX);
346 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
757 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
850 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
965 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
1179 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
1574 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
H A Dnicpci.c455 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol_addr),
457 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol_data),
465 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol_addr),
467 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol_data),
616 si_corereg(pi->sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol),
H A Dflashutl.c88 cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
H A Dsbutils.c449 (coreidx == SI_CC_IDX) &&
1062 idx = SI_CC_IDX;
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/
H A Dhndsoc.h158 #define SI_CC_IDX 0 macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/nvram/
H A Dnvram_rw.c187 if ((cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX))) {
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/sound/soc/bcm947xx/
H A Dbcm947xx-i2s.c423 ret = si_corereg(snd->sih, SI_CC_IDX, OFFSETOF(chipcregs_t, chipcontrol),
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/brcm-boards/bcm947xx/
H A Dsetup.c667 if ((cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX)) == NULL)

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