Searched refs:PPI0_CONTROL (Results 1 - 2 of 2) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A DdefBF561.h314 #define PPI0_CONTROL 0xFFC01000 /* PPI0 Control register */ macro
H A DcdefBF561.h552 #define bfin_read_PPI0_CONTROL() bfin_read16(PPI0_CONTROL)
553 #define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL,val)

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