Searched refs:PMU1_PLL0_PC5_PLL_CTRL_37_32_MASK (Results 1 - 2 of 2) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/
H A Dsbchipc.h1110 #define PMU1_PLL0_PC5_PLL_CTRL_37_32_MASK 0x0000003f macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/
H A Dhndpmu.c2085 tmp &= ~(PMU1_PLL0_PC5_VCO_RNG_MASK | PMU1_PLL0_PC5_PLL_CTRL_37_32_MASK);

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