Searched refs:FShft (Results 1 - 6 of 6) sorted by relevance
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/video/mbx/ |
H A D | reg_bits.h | 8 #define FShft(Field) ((Field) & 0x0000FFFF) macro 9 #define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) 11 #define F1stBit(Field) (UData (1) << FShft (Field)) 17 #define SYSCLKSRC_REF ((0x0) << FShft(SYSCLKSRC_SEL)) 18 #define SYSCLKSRC_PLL_1 ((0x1) << FShft(SYSCLKSRC_SEL)) 19 #define SYSCLKSRC_PLL_2 ((0x2) << FShft(SYSCLKSRC_SEL)) 23 #define PIXCLKSRC_REF ((0x0) << FShft(PIXCLKSRC_SEL)) 24 #define PIXCLKSRC_PLL_1 ((0x1) << FShft(PIXCLKSRC_SEL)) 25 #define PIXCLKSRC_PLL_2 ((0x2) << FShft(PIXCLKSRC_SEL)) 32 #define Core_Pll_M(x) ((x) << FShft(CORE_PLL_ [all...] |
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-pxa/ |
H A D | bitfield.h | 50 * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit 53 * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return 62 * FShft Shift value of the bit field with respect to bit 0. 69 #define FShft(Field) ((Field) & 0x0000FFFF) macro 70 #define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) 72 #define F1stBit(Field) (UData (1) << FShft (Field)) 91 (UData (Value) << FShft (Field)) 110 ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
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H A D | pxa-regs.h | 1903 (((Pixel) - 1) << FShft (LCCR1_PPL)) 1908 (((Tpix) - 1) << FShft (LCCR1_HSW)) 1914 (((Tpix) - 1) << FShft (LCCR1_ELW)) 1920 (((Tpix) - 1) << FShft (LCCR1_BLW)) 1925 (((Line) - 1) << FShft (LCCR2_LPP)) 1931 (((Tln) - 1) << FShft (LCCR2_VSW)) 1937 ((Tln) << FShft (LCCR2_EFW)) 1943 ((Tln) << FShft (LCCR2_BFW)) 1964 (((Div) << FShft (LCCR3_PCD))) 1969 (((Bpp) << FShft (LCCR3_BP [all...] |
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-sa1100/ |
H A D | bitfield.h | 50 * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit 53 * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return 62 * FShft Shift value of the bit field with respect to bit 0. 69 #define FShft(Field) ((Field) & 0x0000FFFF) macro 70 #define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) 72 #define F1stBit(Field) (UData (1) << FShft (Field)) 91 (UData (Value) << FShft (Field)) 110 ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
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H A D | SA-1100.h | 142 (((Size) - 1) << FShft (UDCOMP_OUTMAXP)) 148 (((Size) - 1) << FShft (UDCIMP_INMAXP)) 342 FShft (UTCR1_BRD)) 345 FShft (UTCR2_BRD)) 350 FShft (UTCR1_BRD)) 353 FShft (UTCR2_BRD)) 476 FShft (SDCR3_BRD)) 479 FShft (SDCR4_BRD)) 484 FShft (SDCR3_BRD)) 487 FShft (SDCR4_BR [all...] |
H A D | SA-1101.h | 107 (( (x) - 8 ) << FShft (SMCR_DCAC)) 109 (( (x) - 9 ) << FShft (SMCR_DRAC) 118 ( (x) << FShft (SNPR_VFBsize)) 120 (( (x) + 1 ) << FShft (SNPR_BankSelect ))
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