Lines Matching refs:FShft
142 (((Size) - 1) << FShft (UDCOMP_OUTMAXP))
148 (((Size) - 1) << FShft (UDCIMP_INMAXP))
342 FShft (UTCR1_BRD))
345 FShft (UTCR2_BRD))
350 FShft (UTCR1_BRD))
353 FShft (UTCR2_BRD))
476 FShft (SDCR3_BRD))
479 FShft (SDCR4_BRD))
484 FShft (SDCR3_BRD))
487 FShft (SDCR4_BRD))
627 ((Div)/32 << FShft (MCCR0_ASD))
631 (((Div) + 31)/32 << FShft (MCCR0_ASD))
640 ((Div)/32 << FShft (MCCR0_TSD))
644 (((Div) + 31)/32 << FShft (MCCR0_TSD))
666 (((Div) - 1) << FShft (MCCR0_ECP))
744 (((Size) - 1) << FShft (SSCR0_DSS))
748 (0 << FShft (SSCR0_FRF))
751 (1 << FShft (SSCR0_FRF))
753 (2 << FShft (SSCR0_FRF))
759 (((Div) - 2)/2 << FShft (SSCR0_SCR))
763 (((Div) - 1)/2 << FShft (SSCR0_SCR))
965 (0x00 << FShft (PPCR_CCF))
967 (0x01 << FShft (PPCR_CCF))
969 (0x02 << FShft (PPCR_CCF))
971 (0x03 << FShft (PPCR_CCF))
973 (0x04 << FShft (PPCR_CCF))
975 (0x05 << FShft (PPCR_CCF))
977 (0x06 << FShft (PPCR_CCF))
979 (0x07 << FShft (PPCR_CCF))
981 (0x08 << FShft (PPCR_CCF))
983 (0x09 << FShft (PPCR_CCF))
985 (0x0A << FShft (PPCR_CCF))
987 (0x0B << FShft (PPCR_CCF))
989 (0x0C << FShft (PPCR_CCF))
991 (0x0D << FShft (PPCR_CCF))
993 (0x0E << FShft (PPCR_CCF))
995 (0x0F << FShft (PPCR_CCF))
1079 (0 << FShft (TUCR_TSEL))
1081 (1 << FShft (TUCR_TSEL))
1083 (2 << FShft (TUCR_TSEL))
1085 (3 << FShft (TUCR_TSEL))
1088 (4 << FShft (TUCR_TSEL))
1091 (5 << FShft (TUCR_TSEL))
1093 (6 << FShft (TUCR_TSEL))
1095 (7 << FShft (TUCR_TSEL))
1400 (((Add) - 9) << FShft (MDCNFG_DRAC))
1405 (((Tcpu) - 2)/2 << FShft (MDCNFG_TRP))
1407 (((Tcpu) - 1)/2 << FShft (MDCNFG_TRP))
1410 (((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR))
1412 (((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR))
1415 ((Tcpu) << FShft (MDCNFG_TDL))
1420 ((Tcpu)/8 << FShft (MDCNFG_DRI))
1474 (0 << FShft (MSC_RT))
1476 (1 << FShft (MSC_RT))
1478 (2 << FShft (MSC_RT))
1480 (3 << FShft (MSC_RT))
1488 ((((Tcpu) - 3)/2) << FShft (MSC_RDF))
1490 ((((Tcpu) - 2)/2) << FShft (MSC_RDF))
1493 ((((Tcpu) - 2)/2) << FShft (MSC_RDF))
1495 ((((Tcpu) - 1)/2) << FShft (MSC_RDF))
1500 ((((Tcpu) - 2)/2) << FShft (MSC_RDN))
1502 ((((Tcpu) - 1)/2) << FShft (MSC_RDN))
1505 ((((Tcpu) - 2)/2) << FShft (MSC_RDN))
1507 ((((Tcpu) - 1)/2) << FShft (MSC_RDN))
1511 (((Tcpu)/4) << FShft (MSC_RRR))
1513 ((((Tcpu) + 3)/4) << FShft (MSC_RRR))
1540 ((((Tcpu) - 2)/2) << FShft (MECR_BSIO))
1542 ((((Tcpu) - 1)/2) << FShft (MECR_BSIO))
1546 ((((Tcpu) - 2)/2) << FShft (MECR_BSA))
1548 ((((Tcpu) - 1)/2) << FShft (MECR_BSA))
1551 ((((Tcpu) - 2)/2) << FShft (MECR_BSM))
1553 ((((Tcpu) - 1)/2) << FShft (MECR_BSM))
1686 (0x0 << FShft (DDAR_DS))
1688 (0x1 << FShft (DDAR_DS))
1690 (0x2 << FShft (DDAR_DS))
1692 (0x3 << FShft (DDAR_DS))
1694 (0x4 << FShft (DDAR_DS))
1696 (0x5 << FShft (DDAR_DS))
1698 (0x6 << FShft (DDAR_DS))
1700 (0x7 << FShft (DDAR_DS))
1702 (0x8 << FShft (DDAR_DS))
1704 (0x9 << FShft (DDAR_DS))
1707 (0xA << FShft (DDAR_DS))
1710 (0xB << FShft (DDAR_DS))
1713 (0xC << FShft (DDAR_DS))
1716 (0xD << FShft (DDAR_DS))
1718 (0xE << FShft (DDAR_DS))
1720 (0xF << FShft (DDAR_DS))
1724 (((Add) & 0X003FFFFC) << (FShft (DDAR_DA) - 2)))
1867 (0 << FShft (LCD_PBS))
1869 (1 << FShft (LCD_PBS))
1871 (2 << FShft (LCD_PBS))
1932 ((Tcpu)/2 << FShft (LCCR0_PDD))
1957 (((Pixel) - 16)/16 << FShft (LCCR1_PPL))
1962 (((Tpix) - 1) << FShft (LCCR1_HSW))
1967 (((Tpix) - 1) << FShft (LCCR1_ELW))
1972 (((Tpix) - 1) << FShft (LCCR1_BLW))
1976 (((Line) - 1) << FShft (LCCR2_LPP))
1981 (((Tln) - 1) << FShft (LCCR2_VSW))
1986 ((Tln) << FShft (LCCR2_EFW))
1991 ((Tln) << FShft (LCCR2_BFW))
1998 (((Div) - 4)/2 << FShft (LCCR3_PCD))
2002 (((Div) - 3)/2 << FShft (LCCR3_PCD))
2008 (((Div) - 2)/2 << FShft (LCCR3_ACB))
2012 (((Div) - 1)/2 << FShft (LCCR3_ACB))
2019 (0 << FShft (LCCR3_API))
2022 ((Trans) << FShft (LCCR3_API))